config.h.bak

s3c2410的vxworksBSP

/* config.h - ARM Integrator configuration header */

/* Copyright 1999-2001 ARM Limited */
/* Copyright 1999-2001 Wind River Systems, Inc. */

/*
modification history
--------------------
01o,15jul02,m_h  WindML support, C++ protection
01n,22may02,m_h  Reduce ROM_SIZE for boards with 32 meg RAM (77901)
01m,15may02,m_h  INCLUDE_SHELL, etc are for BSP validation (75760, 75904)
01l,09oct01,jpd  corrected RAM_HIGH_ADRS and LOCAL_MEM_SIZE for integrator946.
                 bump revision number to /5
01k,03oct01,jpd  added support for Integrator 946es/946es_t.
01j,02may01,rec  bump revision number, fix 559 initialization problem
01m,01nov01,t_m  merge in 946 updates
01l,22oct01,jb  Setting MMU_BASIC as default for builds of cpus with MMU
01k,15oct01,jb  New assembly macros are in h/arch/arm/arm.h
01l,09oct01,jpd  corrected RAM_HIGH_ADRS and LOCAL_MEM_SIZE for integrator946.
01k,03oct01,jpd  added support for Integrator 946es/946es_t.
01j,02may01,rec  bump revision number, fix 559 initialization problem
01i,27apr01,rec  add support for 966
01h,25jan01,jmb  remove INCLUDE_MIILIB
01g,15dec00,rec  change RAM_HIGH_ADRS
01f,21nov00,jpd  added support for Intel Ethernet driver.
01e,17feb00,jpd  added define of INCLUDE_FLASH_SIB_FOOTER; raised RAM_HIGH_ADRS.
01d,07feb00,jpd  added support for ARM720T and ARM920T.
01c,13jan00,pr	 add support for Integrator 740T/740T_T.
01b,07dec99,pr	 add DEC and PCI support.
01a,05nov99,ajb  copied from PID BSP version 01p.
*/

/*
This module contains the configuration parameters for the ARM Integrator BSP.
*/

#ifndef	INCconfigh
#define	INCconfigh

#ifdef __cplusplus
extern "C" {
#endif

/* BSP version/revision identification, before configAll.h */

#define BSP_VER_1_1     1       /* 1.2 is backwards compatible with 1.1 */
#define BSP_VER_1_2     1
#define BSP_VERSION	"1.2"
#define BSP_REV		"/5"	/* 0 for first revision */

#include "configAll.h"
#define S3C_EXC_BASE         0x30000100
#if 1
#define DEFAULT_BOOT_LINE "cs(0,0) host:vxWorks h=192.168.0.22 e=192.168.0.10:ffffff00 u=sam pw=sam tn=vxWorks"
#endif
#if 0
#define DEFAULT_BOOT_LINE "tsfs(0,0) host:/tor2/target/config/s3c2410x/vxWorks h=192.168.0.188 e=192.168.0.198:ffffff00 u=target tn=targetname"
#endif
#if 0
#define DEFAULT_BOOT_LINE "tsfs(0,0) amam:/vxWorks h=192.168.0.188 e=192.168.0.67 u=sam pw=sam tn=htz"
#endif
#define UART0_CTL_BASE		0x50000000
/* Memory configuration */
#undef	LOCAL_MEM_AUTOSIZE			/* run-time memory sizing */
#define USER_RESERVED_MEM	0		/* see sysMemTop() */

/*
 * Local-to-Bus memory address constants:
 * the local memory address always appears at 0 locally;
 * it is not dual ported.
 */
#define LOCAL_MEM_LOCAL_ADRS	0x30000000		/* fixed at 0x30000000 */
#define LOCAL_MEM_BUS_ADRS	LOCAL_MEM_LOCAL_ADRS	/* fixed at 0x30000000 */
#define LOCAL_MEM_SIZE		0x04000000		/* 64 Mbytes */
#define LOCAL_MEM_END_ADRS	(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE)

/*
 * Boot ROM is an image written into Flash. Part of the Flash can be
 * reserved for boot parameters etc. (see the Flash section below).
 *
 * The following parameters are defined here and in the Makefile.
 * They must be kept synchronized; effectively config.h depends on Makefile.
 * Any changes made here must be made in the Makefile and vice versa.
 *
 * ROM_BASE_ADRS is the base of the Flash ROM/EPROM.
 * ROM_TEXT_ADRS is the entry point of the VxWorks image
 * ROM_SIZE is the size of the part of the Flash ROM/EPROM allocated to
 *		the VxWorks image (block size - size of headers)
 *
 * Two other constants are used:
 * ROM_COPY_SIZE is the size of the part of the ROM to be copied into RAM
 * 		 (e.g. in uncompressed boot ROM)
 * ROM_SIZE_TOTAL is the size of the entire Flash ROM (used in sysPhysMemDesc)
 *
 * The values are given as literals here to make it easier to ensure
 * that they are the same as those in the Makefile.
 */
#define ROM_BASE_ADRS	0x00000000	/* base of Flash/EPROM */
#define ROM_TEXT_ADRS	ROM_BASE_ADRS	/* code start addr in ROM */
#define ROM_WARM_ADRS	0x00000004	/* code start addr in ROM */
#define ROM_SIZE	0x00200000	/* size of ROM holding VxWorks*/

#define ROM_COPY_SIZE	ROM_SIZE
#define ROM_SIZE_TOTAL	0x00200000	/* total size of ROM */


#define RAM_LOW_ADRS	0x30008000	/* VxWorks image entry point */
#define RAM_HIGH_ADRS	0x33e00000	/* RAM address for ROM boot */

#if 0
#define RAM_LOW_ADRS	0x00100000	/* VxWorks image entry point */
#define RAM_HIGH_ADRS	0x33e00000	/* RAM address for ROM boot */
#endif
/*
 * Count for a CPU delay loop at the beginning of romInit. There have been
 * reports of problems with certain boards and certain power supplies, and
 * adding a delay at the start of romInit appears to help with this. This
 * value may need tuning for different board/PSU combinations.
 */
#define ____BOOT_DELAY_VALUE	0x1000

/*
 * Flash/NVRAM memory configuration
 *
 * A block of the Flash memory (FLASH_SIZE bytes at FLASH_ADRS) is
 * reserved for non-volatile storage of data.
 *
 * See also integrator.h
 */
#if 0

#define INCLUDE_FLASH

#ifdef INCLUDE_FLASH
	#define FLASH_SIZE		0x00200000	/* one 128kbyte block of Flash*/
	#define NV_RAM_SIZE		0x100		/* how much we use as NVRAM */
	#undef	NV_BOOT_OFFSET
	#define NV_BOOT_OFFSET		0		/* bootline at start of NVRAM */
	#define FLASH_NO_OVERLAY			/* do not read-modify-write all of Flash */
	#define INCLUDE_FLASH_SIB_FOOTER		/* add a SIB footer to block */
#else	/* INCLUDE_FLASH */
	#define NV_RAM_SIZE		NONE
#endif	/* INCLUDE_FLASH */
#endif
/* Serial port configuration */
#define INCLUDE_SERIAL
#undef	NUM_TTY
#define NUM_TTY			N_SIO_CHANNELS


/*-------------------------------------------sam------------------------------------------------*/

#undef WDB_COMM_TYPE
#undef WDB_TTY_BAUD
#undef WDB_TTY_CHANNEL
#undef WDB_TTY_DEV_NAME
#if 1
#define WDB_COMM_TYPE         WDB_COMM_SERIAL /* WDB in Serial mode */
#define WDB_TTY_BAUD          115200          /* Baud rate for WDB Connection */
#define WDB_TTY_CHANNEL       1            /* COM PORT #2 */
#define WDB_TTY_DEV_NAME      "/tyCo/1"       /* default TYCODRV_5_2 device name */
#endif
#if 1
#undef  CONSOLE_TTY
#define CONSOLE_TTY           0
#undef  CONSOLE_BAUD_RATE
#define CONSOLE_BAUD_RATE     115200
#endif
#if 0
#undef  CONSOLE_TTY
#define CONSOLE_TTY           NONE
#endif
/*
 * Cache/MMU configuration
 *
 * Note that when MMU is enabled, cache modes are controlled by
 * the MMU table entries in sysPhysMemDesc[], not the cache mode
 * macros defined here.
 */

/*
 * We use the generic architecture libraries, with caches/MMUs present. A
 * call to sysHwInit0() is needed from within usrInit before
 * cacheLibInit() is called.
 */
#ifndef _ASMLANGUAGE
IMPORT void sysHwInit0 (void);
#endif
#define INCLUDE_SYS_HW_INIT_0
#define SYS_HW_INIT_0()         sysHwInit0()

/*
 * I-cache mode is a bit of an inappropriate concept, but use this.
 */
#undef  USER_I_CACHE_MODE
#define USER_I_CACHE_MODE       CACHE_WRITETHROUGH

/* has to be this. */
#undef  USER_D_CACHE_MODE
#define USER_D_CACHE_MODE       CACHE_COPYBACK



/*
 * Include MMU BASIC and CACHE support for command line and project builds
 */
 
 /*---------------------------------------sam--------------------------------------------*/
 #if 0
 #define	INCLUDE_MMU
#define	INCLUDE_MMU_BASIC
#define INCLUDE_CACHE_SUPPORT
#endif
#undef	INCLUDE_MMU_BASIC
#undef INCLUDE_CACHE_SUPPORT
#if 1
/* Enhanced Network Driver (END) Support */
#ifndef INCLUDE_END
#define INCLUDE_END
#endif
#endif
#if 0
#undef INCLUDE_END
#endif
/*
 * WDB configuration.
 */
  /*---------------------------------------sam--------------------------------------------*/
#if 1
#define INCLUDE_NETWORK

#endif
#if 0
#undef INCLUDE_NETWORK
#endif

#define INCLUDE_WDB
#undef  WDB_COMM_TYPE
#if 0
 #define WDB_COMM_TYPE	WDB_COMM_SERIAL  
#endif
#if 1
#define WDB_COMM_TYPE	WDB_COMM_END 
#endif
#if 0
#define INCLUDE_TSTS_BOOT

#endif

/*
 * Interrupt mode - interrupts can be in either preemptive or non-preemptive
 * mode.  For non-preemptive mode, change INT_MODE to INT_NON_PREEMPT_MODEL
 */
#define INT_MODE	INT_PREEMPT_MODEL

/*
 * Enable BSP-configurable interrupt priorities: order of servicing and
 * masking of interrupts will be determined by ambaIntLvlPriMap[] in
 * sysLib.c.  If AMBA_INT_PRIORITY_MAP is not defined, priority of
 * interrupts will be least-significant bit first.
 */

#define	s3c2410x_INT_PRIORITY_MAP	/* BSP-configurable interrupt priorities */


/*
 * miscellaneous definitions
 * Note: ISR_STACK_SIZE is defined here rather than in ../all/configAll.h
 * (as is more usual) because the stack size depends on the interrupt
 * structure of the BSP.
 */
#define ISR_STACK_SIZE	0x400	/* size of ISR stack, in bytes */



/* Optional timestamp support */
#undef	INCLUDE_TIMESTAMP	/* define to include timestamp driver */
/*#define INCLUDE_TIMESTAMP*/


#include "s3c2410x.h"

#undef BSP_VTS
#ifdef BSP_VTS

/***************************************************
 * Add these defines for the Validation Test Suite *
 ***************************************************/
#define INCLUDE_SHELL
#undef INCLUDE_RLOGIN
#undef INCLUDE_SHOW_ROUTINES
#undef INCLUDE_NET_SYM_TBL
#define INCLUDE_LOADER

#undef INCLUDE_PING
#undef INCLUDE_NET_SHOW
#endif /*BSP_VTS*/

#undef INCLUDE_WINDML          /* define to include windML support */

#ifdef __cplusplus
}
#endif
#endif  /* INCconfigh */

#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif