syslib.c

s3c2410的vxworksBSP

 * This function returns a pointer to a BSP version with the revision.
 * e.g. 1.2/<x>. BSP_REV is concatenated to BSP_VERSION to form the
 * BSP identification string.
 *
 * RETURNS: A pointer to the BSP version/revision string.
 */
char* sysBspRev(void)
{
	return (BSP_VERSION BSP_REV);
}

/*
 * sysHwInit0 - perform early BSP-specific initialisation
 *
 * This routine performs such BSP-specific initialisation as is necessary before
 * the architecture-independent cacheLibInit can be called. It is called
 * from usrInit() before cacheLibInit(), before sysHwInit() and before BSS
 * has been cleared.
 *
 * RETURNS: N/A
 */
void sysHwInit0(void)
{
#ifdef INCLUDE_CACHE_SUPPORT
	/*
	 * Install the appropriate cache library, no address translation
	 * routines are required for this BSP, as the default memory map has
	 * virtual and physical addresses the same.
	 */
	cacheArm920tLibInstall (NULL, NULL);
#endif	/* INCLUDE_CACHE_SUPPORT */

#if defined(INCLUDE_MMU)
	/* Install the appropriate MMU library and translation routines */
	mmuArm920tLibInstall (NULL, NULL);
#endif	/* defined(INCLUDE_MMU) */

	return;
}










/*
 * sysHwInit - initialize the CPU board hardware
 *
 * This routine initializes various features of the hardware.
 * Normally, it is called from usrInit() in usrConfig.c.
 *
 * NOTE: This routine should not be called directly by the user.
 *
 * RETURNS: N/A
 */
void sysHwInit(void)
{
      s3cExcVecSet();
	/* install the IRQ/SVC interrupt stack splitting routine */
	_func_armIntStackSplit = sysIntStackSplit;

#ifdef INCLUDE_SERIAL
	/* initialise the serial devices */
	sysSerialHwInit ();      /* initialise serial data structure */
#endif	/* INCLUDE_SERIAL */
 
}

void s3cExcVecSet(void)
{
    int i;
    i = (int)&excEnterUndef;
    *((volatile int*)(S3C_EXC_BASE + 0x0)) = i;

    i = (int)&excEnterSwi;
    *((volatile int*)(S3C_EXC_BASE + 0x4)) = i;

    i = (int)&excEnterPrefetchAbort;
    *((volatile int*)(S3C_EXC_BASE + 0x8)) = i;

    i = (int)&excEnterDataAbort;
    *((volatile int*)(S3C_EXC_BASE + 0xc)) = i;

    i = (int)&intEnt;
    *((volatile int*)(S3C_EXC_BASE + 0x14)) = i;

    return;
    
}


/*
 * sysHwInit2 - additional system configuration and initialization
 *
 * This routine connects system interrupts and does any additional
 * configuration necessary.  Note that this is called from
 * sysClkConnect() in the timer driver.
 *
 * RETURNS: N/A
 *
 */
void sysHwInit2(void)
{
	static BOOL initialised = FALSE;

	if(initialised) return;

	/* initialise the interrupt library and interrupt driver */
	intLibInit (s3c2410x_INT_NUM_LEVELS, s3c2410x_INT_NUM_LEVELS, INT_MODE);
	s3c2410xIntDevInit();

	/* connect sys clock interrupt and auxiliary clock interrupt */
	(void)intConnect (INUM_TO_IVEC (SYS_TIMER_INT_VEC), sysClkInt, 0);
	(void)intConnect (INUM_TO_IVEC (AUX_TIMER_INT_VEC), sysAuxClkInt, 0);

#ifdef INCLUDE_SERIAL
	/* connect serial interrupt */
	sysSerialHwInit2();
#endif	/* INCLUDE_SERIAL */

	initialised = TRUE;

}

/*
 * sysPhysMemTop - get the address of the top of physical memory
 *
 * This routine returns the address of the first missing byte of memory,
 * which indicates the top of memory.
 *
 * Normally, the user specifies the amount of physical memory with the
 * macro LOCAL_MEM_SIZE in config.h.  BSPs that support run-time
 * memory sizing do so only if the macro LOCAL_MEM_AUTOSIZE is defined.
 * If not defined, then LOCAL_MEM_SIZE is assumed to be, and must be, the
 * true size of physical memory.
 *
 * NOTE: Do no adjust LOCAL_MEM_SIZE to reserve memory for application
 * use.  See sysMemTop() for more information on reserving memory.
 *
 * RETURNS: The address of the top of physical memory.
 *
 * SEE ALSO: sysMemTop()
 */
char* sysPhysMemTop(void)
{
	static char * physTop = NULL;

	if(physTop == NULL)
	{
#ifdef LOCAL_MEM_AUTOSIZE

	/* If auto-sizing is possible, this would be the spot.  */
#	error   "Dynamic memory sizing not supported"

#else
	/* Don't do autosizing, if size is given */
	physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);

#endif	/* LOCAL_MEM_AUTOSIZE */
	}

	return physTop;
}

/*
 * sysMemTop - get the address of the top of VxWorks memory
 *
 * This routine returns a pointer to the first byte of memory not
 * controlled or used by VxWorks.
 *
 * The user can reserve memory space by defining the macro USER_RESERVED_MEM
 * in config.h.  This routine returns the address of the reserved memory
 * area.  The value of USER_RESERVED_MEM is in bytes.
 *
 * RETURNS: The address of the top of VxWorks memory.
 */
char* sysMemTop(void)
{
	static char * memTop = NULL;

	if(memTop == NULL)
	{
		memTop = sysPhysMemTop () - USER_RESERVED_MEM;
	}

	return memTop;
}

/*
 * sysToMonitor - transfer control to the ROM monitor
 *
 * This routine transfers control to the ROM monitor.  It is usually called
 * only by reboot() -- which services ^X -- and bus errors at interrupt
 * level.  However, in some circumstances, the user may wish to introduce a
 * new <startType> to enable special boot ROM facilities.
 *
 * RETURNS: Does not return.
 */
/* startType, passed to ROM to tell it how to boot */
STATUS sysToMonitor(int startType)
{
	FUNCPTR	pRom;
	UINT32* p = (UINT32 *)ROM_TEXT_ADRS;

#ifdef INCLUDE_SERIAL
	sysSerialReset ();	/* put serial devices into quiet state */
#endif

	/*
	 * Examine ROM - if it's a VxWorks boot ROM, jump to the warm boot entry
	 * point; otherwise jump to the start of the ROM.
	 * A VxWorks boot ROM begins
	 *    MOV	R0,#BOOT_COLD
	 *    B	...
	 *    DCB	"Copyright"
	 * We check the first and third words only. This could be tightened up
	 * if required (see romInit.s).
	 */
	if(p[0] == 0xE3A00002 && p[2] == 0x79706F43)
		pRom = (FUNCPTR)(ROM_TEXT_ADRS + 0x24);	/* warm boot address */
	else
		pRom = (FUNCPTR)(ROM_TEXT_ADRS + 0x20);	/* start of ROM */

	VM_ENABLE(FALSE);	/* disable the MMU, cache(s) and write-buffer */


	/*
	 * On 920T, can have the I-cache enabled once the MMU has been
	 * disabled, so, unlike the other processors, disabling the MMU does
	 * not disable the I-cache.  This would not be a problem, as the
	 * 920T boot ROM initialisation code disables and flushes both caches.
	 * However, in case we are, in fact, using a 7TDMI boot ROM,
	 * disable and flush the I-cache here, or else the boot process may
	 * fail.
	 */
	cacheDisable (INSTRUCTION_CACHE);

	(*pRom)(startType);	/* jump to boot ROM */

	return OK;		/* in case we ever continue from ROM monitor */
}

/*
 * sysProcNumGet - get the processor number
 *
 * This routine returns the processor number for the CPU board, which is
 * set with sysProcNumSet().
 *
 * RETURNS: The processor number for the CPU board.
 *
 * SEE ALSO: sysProcNumSet()
 */
int sysProcNumGet(void)
{
	return sysProcNum;
}

/*
 * sysProcNumSet - set the processor number
 *
 * Set the processor number for the CPU board.  Processor numbers should be
 * unique on a single backplane.
 *
 * NOTE
 * By convention, only processor 0 should dual-port its memory.
 *
 * RETURNS: N/A
 *
 * SEE ALSO: sysProcNumGet()
 */

/* procNum, processor number */
void sysProcNumSet(int procNum)
{
	sysProcNum = procNum;
}