mcnc.tab

对于研究FPGA结构的人来说

# AND gates
.DEFINE AND8(in0, in1, in2, in3, in4, in5, in6, in7; out)
11111111 1
.MAP AND7 AND8(in0, in1, in2, in3, in4, in5, in6, 1; out)
.MAP AND6 AND7(in0, in1, in2, in3, in4, in5, 1; out)
.MAP AND5 AND6(in0, in1, in2, in3, in4, 1; out)
.MAP AND4 AND5(in0, in1, in2, in3, 1; out)
.MAP AND3 AND4(in0, in1, in2, 1; out)
.MAP AND2 AND3(in0, in1, 1; out)

# OR gates
.DEFINE OR8(in0, in1, in2, in3, in4, in5, in6, in7; out)
1------- 1
-1------ 1
--1----- 1
---1---- 1
----1--- 1
-----1-- 1
------1- 1
-------1 1
.MAP OR7 OR8(in0, in1, in2, in3, in4, in5, in6, 0; out)
.MAP OR6 OR7(in0, in1, in2, in3, in4, in5, 0; out)
.MAP OR5 OR6(in0, in1, in2, in3, in4, 0; out)
.MAP OR4 OR5(in0, in1, in2, in3, 0; out)
.MAP OR3 OR4(in0, in1, in2, 0; out)
.MAP OR2 OR5(in0, in1, 0, 0, 0; out)

# CONSTANTS
.DEFINE GND( ;out)
.DEFINE VCC(;out)
1
.MAP FALSE GND(;out)
.MAP TRUE VCC(;out)
.MAP DC TRUE(;out)

# FLIP-FLOPS
.LATCH DFF(in, clk; out) 

# Test flip-flop aliasing
# NOTE: DOESN'T WORK YET
# .ALIAS MYDFF DFF

# OTHER
.DEFINE MUX2(in0, in1, sel; out)
1-0 1
-11 1
.DEFINE INV(in; out)
0 1

.END