readme

对于研究FPGA结构的人来说

edif2blif Version 1.00
June 30, 1998

Author: Paul Leventis ([e-mail])
Web Page: ****

Contents
^^^^^^^^

  Author's Note
  Installation
  Documentation
  Shell Scripts for SIS
  Translation Tables Provided


Author's Note
^^^^^^^^^^^^^

This code grew from a "quick" effort to convert EDIF to BLIF, and very quickly
expanded beyond its original design.  In fact, this utility was supposed to be
part of CIRC.  So please excuse the mess in the code; if you are interested in 
using or altering this code for your own EDIF parser (I don't know why you
would :)), please feel free to e-mail me for a quick rundown on how it works.
I intend on re-writing this code and releasing a new version sometime around
September, 1998.

If you've used edif2blif to convert files from some source other than Altera
MaxPlus2 or the MCNC benchmark suite, please let me know about it so I can
add the information to the documentation.


Installation
^^^^^^^^^^^^

Change to the src directory.  Check the Makefile to ensure that the tool names 
and locations are correct.  Type "make" to make edif2blif.  edif2blif is a 
stand-alone application and as such can be run from any location.


Documentation
^^^^^^^^^^^^^

The user documentation is available in Postscript, Portable Document Format, 
and LaTeX formats in the /doc directory.


Shell Scripts for SIS
^^^^^^^^^^^^^^^^^^^^^

A number of shell scripts are provided in the scripts directory to make it
easier to perform logic optimization and packing.  Before using any of the 
shell scripts, make sure that the SISSCRIPTS environment variable is set to the
directory where the script.* files are installed.  Alternatively, you may alter
the scripts to point to the correct location.

All of these scripts require SIS version 1.1 or higher with the flowpack, 
flowmap, and dmig features.  A functioning SIS executable for SunOS/Solaris is 
available on the edif2blif home page. 

All scripts accept an argument WITHOUT an extension.

To optimize a blif circuit:
	goalg circuit     (makes circuit.alg.blif)
    gorugged circuit  (makes circuit.rugged.blif)

To pack circuit.alg.blif into 4-LUTs:
	gopack circuit.alg 4   (makes circuit.alg.4.blif)


Translation Tables Provided
^^^^^^^^^^^^^^^^^^^^^^^^^^^

The tab directory contains translation tables that have been tested to some 
degree.  Any mistakes or omissions in these files should be reported to
[e-mail].


altera.tab

This tab file works for output from the Altera MaxPlus2 EDIF Netlist Writer.
It is possible that there are cells missing from this translation table, though
it has worked for five different circuits that have been tested with it.


mcnc.tab

This tab file can convert EDIF files in the MCNC benchmark circuit suite to
BLIF.  It has been tested with a few of the circuits and has been found to
work for all of them.  The resulting BLIF files, after optimization, were
functionally equivalent to the original EDIF files.