usb.c.svn-base

这是三星的2443的wince的bootloader

	UINT8 Interface;
	UINT8 Endpoint0;
	UINT8 Endpoint1;
	UINT8 Endpoint3;
} USB_GET_STATUS;

static USB_GET_STATUS 			oStatusGet;


typedef struct USB_INTERFACE_GET
{
	UINT8 AlternateSetting;
} USB_INTERFACE_GET;

static USB_INTERFACE_GET 		oInterfaceGet;

typedef struct USB_DESCRIPTORS
{
	USB_CONFIGURATION_DESCRIPTOR oDescConfig;
	USB_INTERFACE_DESCRIPTOR oDescInterface;
	USB_ENDPOINT_DESCRIPTOR oDescEndpt1;
	USB_ENDPOINT_DESCRIPTOR oDescEndpt3;
} USB_DESCRIPTORS;

USB_DESCRIPTORS oDesc;

void Isr_Init(void);
void IsrUsbd(unsigned int val);
void IsrHandler(void);
void SetEndpoint(void);

void WrPktEp1(UINT8 *buf, int num)
{
	int i;
	UINT16 Wr_Data=0;

	if (num&0x1) num++;
	for(i=0;i<num;i+=2)
	{
		Wr_Data=((*(buf+1))<<8)|*buf;
	   Outp32(EP1_FIFO, Wr_Data);
	   buf +=2;
	}
}

void RdPktEp3(UINT8 *buf, int num)
{
	int i;
	UINT16 Rdata;

	for(i=0;i<num;i+=2)
	{
		Inp32(EP3_FIFO, Rdata);
		buf[i] = (UINT8)Rdata;
		buf[i+1] = (UINT8)(Rdata>>8);
	}

	g_pDownPt += num;
}



void WrPktEp0(UINT8 *buf, int num)
{
	int i;
	UINT16 Wr_Data=0;

	if (num&0x1) num++;
	for(i=0;i<num;i+=2)
	{
		Wr_Data=((*(buf+1))<<8)|*buf;
		Outp32(EP0_FIFO, Wr_Data);
		buf +=2;
	}
}


void PrintEp0Pkt(UINT8 *pt, UINT8 count)
{
	int i;
	//EdbgOutputDebugString("[DBG:");
	for(i=0;i<count;i++);
		//EdbgOutputDebugString("%x,", pt[i]);
	//EdbgOutputDebugString("]");
}


void SetDescriptorTable(void)
{	
	// Standard device descriptor
	g_oDescDevice.bLength=0x12;	// EP0_DEV_DESC_SIZE=0x12 bytes
	g_oDescDevice.bDescriptorType=DEVICE_TYPE_;
	g_oDescDevice.bDeviceClass=0xFF; // 0x0
	g_oDescDevice.bDeviceSubClass=0x0;
	g_oDescDevice.bDeviceProtocol=0x0;
	g_oDescDevice.bMaxPacketSize0=g_uEp0MaxPktSize;
	g_oDescDevice.idVendorL=0xe8;
	g_oDescDevice.idVendorH=0x04;	
//	g_oDescDevice.idVendorL=0x45;
//	g_oDescDevice.idVendorH=0x53;
	g_oDescDevice.idProductL=0x34;
	g_oDescDevice.idProductH=0x12;
	g_oDescDevice.bcdDeviceL=0x00;
	g_oDescDevice.bcdDeviceH=0x01;
	g_oDescDevice.iManufacturer=0x1; // index of string descriptor
	g_oDescDevice.iProduct=0x2;	// index of string descriptor
	g_oDescDevice.iSerialNumber=0x0;
	g_oDescDevice.bNumConfigurations=0x1;
	
	if (g_eSpeed == USB_FULL) {
		g_oDescDevice.bcdUSBL=0x10;
		g_oDescDevice.bcdUSBH=0x01; 	// Ver 1.10
	}
	else {
		g_oDescDevice.bcdUSBL=0x00;
		g_oDescDevice.bcdUSBH=0x02; 	// Ver 2.0
	}

	// Standard configuration descriptor
	oDesc.oDescConfig.bLength=0x9;
	oDesc.oDescConfig.bDescriptorType=CONFIGURATION_TYPE;
	oDesc.oDescConfig.wTotalLengthL=0x20; // <cfg desc>+<if desc>+<endp0 desc>+<endp1 desc>
	oDesc.oDescConfig.wTotalLengthH=0;
	oDesc.oDescConfig.bNumInterfaces=1;
// dbg    descConf.bConfigurationValue=2; // why 2? There's no reason.
	oDesc.oDescConfig.bConfigurationValue=1;
	oDesc.oDescConfig.iConfiguration=0;
	oDesc.oDescConfig.bmAttributes=CONF_ATTR_DEFAULT; // bus powered only.
	oDesc.oDescConfig.maxPower=25; // draws 50mA current from the USB bus.

	// Standard interface descriptor
	oDesc.oDescInterface.bLength=0x9;
	oDesc.oDescInterface.bDescriptorType=INTERFACE_TYPE_;
	oDesc.oDescInterface.bInterfaceNumber=0x0;
	oDesc.oDescInterface.bAlternateSetting=0x0; // ?
	oDesc.oDescInterface.bNumEndpoints=2;	// # of endpoints except EP0
	oDesc.oDescInterface.bInterfaceClass=0xff; // 0x0 ?
	oDesc.oDescInterface.bInterfaceSubClass=0x0;
	oDesc.oDescInterface.bInterfaceProtocol=0x0;
	oDesc.oDescInterface.iInterface=0x0;

	// Standard endpoint0 descriptor
	oDesc.oDescEndpt1.bLength=0x7;
	oDesc.oDescEndpt1.bDescriptorType=ENDPOINT_TYPE;
	oDesc.oDescEndpt1.bEndpointAddress=1|EP_ADDR_IN; // 2400Xendpoint 1 is IN endpoint.
	oDesc.oDescEndpt1.bmAttributes=EP_ATTR_BULK;
	oDesc.oDescEndpt1.wMaxPacketSizeL=(UINT8)g_uEp1MaxPktSize; // 64
	oDesc.oDescEndpt1.wMaxPacketSizeH=(UINT8)(g_uEp1MaxPktSize>>8);
	oDesc.oDescEndpt1.bInterval=0x0; // not used

	// Standard endpoint1 descriptor
	oDesc.oDescEndpt3.bLength=0x7;
	oDesc.oDescEndpt3.bDescriptorType=ENDPOINT_TYPE;
	oDesc.oDescEndpt3.bEndpointAddress=3|EP_ADDR_OUT; // 2400X endpoint 3 is OUT endpoint.
	oDesc.oDescEndpt3.bmAttributes=EP_ATTR_BULK;
	oDesc.oDescEndpt3.wMaxPacketSizeL=(UINT8)g_uEp3MaxPktSize; // 64
	oDesc.oDescEndpt3.wMaxPacketSizeH=(UINT8)(g_uEp3MaxPktSize>>8);
	oDesc.oDescEndpt3.bInterval=0x0; // not used
}

BOOL InitUSB()
{

	volatile S3C2443_CLKPWR_REG *s2443PWR = (S3C2443_CLKPWR_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_CLOCK_POWER, FALSE);
	volatile S3C2443_IOPORT_REG *s2443IOP = (S3C2443_IOPORT_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_IOPORT, FALSE);
	//pUSBCtrlAddr = (S3C2443_USBD_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_USBD, FALSE);

	s2443IOP->MISCCR=s2443IOP->MISCCR&~(1<<12);  // USBD is 0 ,normal mode ,1 is suspend mode /


	s2443PWR->PWRCFG |= (0x1<<4); // phy power enable 
//USB device 2.0 must reset like bellow , 1st phy reset and after at least 10us, func_reset & host reset     
//phy reset can reset bellow registers.
	s2443PWR->USB_RSTCON = (0x0<<2)|(0x0<<1)|(0x1<<0);//Function 2.0 S/W reset, Host 1.1 S/W reset,PHY 2.0 S/W reset
	delayLoop(1000000); // phy reset must be asserted for at 10us 
	s2443PWR->USB_RSTCON = (0x1<<2)|(0x1<<1)|(0x0<<0);//Function 2.0 S/W reset, Host 1.1 S/W reset,PHY 2.0 S/W reset
   	s2443PWR->USB_RSTCON = (0x0<<2)|(0x0<<1)|(0x0<<0);//Function 2.0 S/W reset, Host 1.1 S/W reset,PHY 2.0 S/W reset

	s2443PWR->USB_PHYCTRL =(0x00<<3)|(0x0<<2)|(0x1<<1)|(0x0<<0);  //48Mhz,Oscillator,External X-tal,device
    //s2443PWR->USB_PHYPWR = (0x1<<31)|(0x0<<4)|(0x0<<3)|(0x0<<2)|(0x0<<1)|(0x0<<0); 
    s2443PWR->USB_PHYPWR = (0x0<<31)|(0x3<<4)|(0x0<<3)|(0x0<<2)|(0x0<<1)|(0x0<<0);
    //48Mhz clock on ,PHY2.0 analog block power on,XO block power on,XO block power in suspend mode,PHY 2.0 Pll power on ,suspend signal for save mode disable 
    
	s2443PWR->USB_CLKCON = (0x1<<31)|(0x1<<2)|(0x0<<1)|(0x1<<0); // vbus detect enable...
	
    //D+ pull up , USB2.0 Function clock Enable, USB1.1 HOST disable,USB2.0 PHY test enable


  //rHCLKCON &= ~(0x1<<12); //
  //	s2443PWR->CLKDIV1|=0x1<<4; //  for test clk enable
  

	g_uEp0State = EP0_STATE_INIT;
	g_pDownPt = (UINT8 *)DMABUFFER;
	readPtIndex = DMABUFFER;
	SetDescriptorTable();

	// *** End point information ***

	SetEndpoint();

	return TRUE;
}

void SetEndpoint(void)
{
	// *** End point information ***
	// EP0: control
//	UINT16 SysStatus;
	UINT16 Temp;

	Outp32(INDEX_REG, EP0);
	// For L18
	Outp32(EP_DIR_REG, 0x02); 		// EP1=> TX, EP2=>RX , 0b=report mode[1], 15b=report mode[2], 3b~8b=ep2 delay_con
	Outp32(EP_INT_EN_REG, 0x4d0f); 	// EP0, 1, 2 Interrupt enable, 15b=report mode[0], 3b~14b=ep0/1 delay_con
	Inp32(EP_DIR_REG, Temp);
	//EdbgOutputDebugString("EP_DIR_REG : %x \n", Temp);
	Inp32(EP_INT_EN_REG, Temp);
	//EdbgOutputDebugString("EP_INT_EN_REG : %x \n", Temp);

	Outp32(TEST_REG, 0x0000);

	//Outp32(SYS_CON_REG, 0x0283);		// error interrupt enable, 16bit bus, Little format, suspend&reset enable
	//Outp32(SYS_CON_REG, 0x0023);		// error interrupt enable, 16bit bus, Little format, suspend&reset enable
	Outp32(SYS_CON_REG, 0x4123);		// error interrupt enable, 16bit bus, Little format, suspend&reset enable	
// 	Outp32(MAX_PKT_REG, MAXP_SIZE_64BYTE); // Initial矫 size?
	Outp32(EP0_CON_REG, 0x0000);


	// EP1 OUT Max Packet size settings
	Outp32(INDEX_REG, EP1);
// 	Outp32(MAX_PKT_REG, 512); 	// max packet size 512 bytes
//	Outp32(EP_CON_REG, 0x0000); // dual enable
	Outp32(EP_CON_REG, 0x0080); // dual enable

	// EP2 IN Max Packet size settings
	Outp32(INDEX_REG, EP3);
// 	Outp32(MAX_PKT_REG, 512);	// max packet size 512 bytes
	Outp32(EP_CON_REG, 0x0080);    		// dual enable

	Outp32(INDEX_REG, EP0);

}

void SetMaxPktSizes(USB_SPEED eSpeed)
{
	if (eSpeed == USB_HIGH)
	{
		g_eSpeed = USB_HIGH;
		g_uEp0MaxPktSize = 64;
		g_uEp1MaxPktSize = 256;
		g_uEp3MaxPktSize = 256;
	}
	else
	{
		g_eSpeed = USB_FULL;
		g_uEp0MaxPktSize = 8;
		g_uEp1MaxPktSize = 64;
		g_uEp3MaxPktSize = 64;
	}
	// EP0 Max Packet size settings
	Outp32(INDEX_REG, EP0);
	Outp32(MAX_PKT_REG, g_uEp0MaxPktSize); 	// max packet size

	// EP1 OUT Max Packet size settings
	Outp32(INDEX_REG, EP1);
	Outp32(MAX_PKT_REG, g_uEp1MaxPktSize); 	// max packet size

	// EP2 IN Max Packet size settings
	Outp32(INDEX_REG, EP3);
	Outp32(MAX_PKT_REG, g_uEp3MaxPktSize);	// max packet size
}

void TransferEp0(void)
{
//	UINT32 i;
//	UINT32 dataLength;
	UINT16 usSysStatus;

// 	CLR_EP0_CSR_OUT_PACKET_READY;
	switch (g_uEp0State)
	{
		case EP0_STATE_INIT:
			break;

		// === GET_DESCRIPTOR:DEVICE ===
		case EP0_STATE_GD_DEV_0:
			if (g_eSpeed == 1)
			{
				Outp32(BYTE_WRITE_CNT_REG, 18);
						WrPktEp0((UINT8 *)&g_oDescDevice+0, 18); // EP0_PKT_SIZE
						g_uEp0State = EP0_STATE_INIT;
				//EdbgOutputDebugString("EndpointZeroTransfer(EP0_STATE_GD_DEV)\n");
			}
			else
			{
				Outp32(BYTE_WRITE_CNT_REG, 8);
						WrPktEp0((UINT8 *)&g_oDescDevice+0, 8); // EP0_PKT_SIZE
						g_uEp0State = EP0_STATE_GD_DEV_1;
				//EdbgOutputDebugString("EndpointZeroTransfer(EP0_STATE_GD_DEV_0)\n");
			}
			break;

		case EP0_STATE_GD_DEV_1:
			Outp32(BYTE_WRITE_CNT_REG, 8);
					WrPktEp0((UINT8 *)&g_oDescDevice+8, 8); // EP0_PKT_SIZE
					g_uEp0State = EP0_STATE_GD_DEV_2;
			//EdbgOutputDebugString("EndpointZeroTransfer(EP0_STATE_GD_DEV_1)\n");
			break;

		case EP0_STATE_GD_DEV_2:
			Outp32(BYTE_WRITE_CNT_REG, 2);
					WrPktEp0((UINT8 *)&g_oDescDevice+16, 2); // EP0_PKT_SIZE
					g_uEp0State = EP0_STATE_INIT;
			//EdbgOutputDebugString("EndpointZeroTransfer(EP0_STATE_GD_DEV_2)\n");
			break;

		// === GET_DESCRIPTOR:CONFIGURATION+INTERFACE+ENDPOINT0+ENDPOINT1 ===
		// Windows98 gets these 4 descriptors all together by issuing only a request.
		// Windows2000 gets each descriptor seperately.
		// === GET_DESCRIPTOR:CONFIGURATION ONLY for WIN2K===

		case EP0_STATE_GD_CFG_0:
			if (g_eSpeed == 1)
			{
				Outp32(BYTE_WRITE_CNT_REG, 32);
				WrPktEp0((UINT8 *)&oDesc.oDescConfig+0, 32); // EP0_PKT_SIZE
				g_uEp0State = EP0_STATE_INIT;
				//EdbgOutputDebugString("EndpointZeroTransfer(EP0_STATE_GD_CFG)\n");
			}
			else
			{
				Outp32(BYTE_WRITE_CNT_REG, 8);
				WrPktEp0((UINT8 *)&oDesc.oDescConfig+0, 8); // EP0_PKT_SIZE
				g_uEp0State = EP0_STATE_GD_CFG_1;
				//EdbgOutputDebugString("EndpointZeroTransfer(EP0_STATE_GD_CFG_0)\n");
			}
			break;

		case EP0_STATE_GD_CFG_1:
			Outp32(BYTE_WRITE_CNT_REG, 8);
			WrPktEp0((UINT8 *)&oDesc.oDescConfig+8, 8); // EP0_PKT_SIZE	WrPktEp0((UINT8 *)&descConf+8, 1); WrPktEp0((UINT8 *)&descIf+0, 7);
			g_uEp0State = EP0_STATE_GD_CFG_2;
			break;

		case EP0_STATE_GD_CFG_2:
			Outp32(BYTE_WRITE_CNT_REG, 8);
			WrPktEp0((UINT8 *)&oDesc.oDescConfig+16, 8); // EP0_PKT_SIZE	WrPktEp0((UINT8 *)&descIf+7, 2); WrPktEp0((UINT8 *)&descEndpt0+0, 6);
			g_uEp0State = EP0_STATE_GD_CFG_3;
			break;

		case EP0_STATE_GD_CFG_3:
			Outp32(BYTE_WRITE_CNT_REG, 8);
			WrPktEp0((UINT8 *)&oDesc.oDescConfig+24, 8); // EP0_PKT_SIZE	WrPktEp0((UINT8 *)&descEndpt0+6, 1); WrPktEp0((UINT8 *)&descEndpt1+0, 7);
			g_uEp0State = EP0_STATE_GD_CFG_4;
			break;

		case EP0_STATE_GD_CFG_4:
			Outp32(BYTE_WRITE_CNT_REG, 0);
			g_uEp0State = EP0_STATE_INIT;
			break;

		// === GET_DESCRIPTOR:CONFIGURATION ONLY===
		case EP0_STATE_GD_CFG_ONLY_0:
			if (g_eSpeed == 1)
			{
				//EdbgOutputDebugString("[DBG : EP0_STATE_GD_CFG_ONLY]\n");
				Outp32(BYTE_WRITE_CNT_REG, 9);
				WrPktEp0((UINT8 *)&oDesc.oDescConfig+0, 9); // EP0_PKT_SIZE
				g_uEp0State = EP0_STATE_INIT;
			}
			else
			{
				//EdbgOutputDebugString("[DBG : EP0_STATE_GD_CFG_ONLY_0]\n");
				Outp32(BYTE_WRITE_CNT_REG, 8);
				WrPktEp0((UINT8 *)&oDesc.oDescConfig+0, 8); // EP0_PKT_SIZE
				g_uEp0State = EP0_STATE_GD_CFG_ONLY_1;
			}
			break;

		case EP0_STATE_GD_CFG_ONLY_1:
			//EdbgOutputDebugString("[DBG : EP0_STATE_GD_CFG_ONLY_1]\n");
			Outp32(BYTE_WRITE_CNT_REG, 1);
			WrPktEp0((UINT8 *)&oDesc.oDescConfig+8, 1); // EP0_PKT_SIZE
			g_uEp0State = EP0_STATE_INIT;
			break;

		// === GET_DESCRIPTOR:INTERFACE ONLY===