📄 p1.lst
字号:
00AF: 30 HALT
00B0: 30 HALT
00B1: 30 HALT
00B2: 30 HALT
00B3: 30 HALT
00B4: 30 HALT
00B5: 30 HALT
00B6: 30 HALT
00B7: 30 HALT
00B8: 30 HALT
00B9: 30 HALT
00BA: 30 HALT
00BB: 30 HALT
00BC: 30 HALT
00BD: 30 HALT
00BE: 30 HALT
00BF: 30 HALT
00C0: 30 HALT
00C1: 30 HALT
00C2: 30 HALT
00C3: 30 HALT
00C4: 30 HALT
00C5: 30 HALT
00C6: 30 HALT
00C7: 30 HALT
00C8: 30 HALT
00C9: 30 HALT
00CA: 30 HALT
00CB: 30 HALT
00CC: 30 HALT
00CD: 30 HALT
00CE: 30 HALT
00CF: 30 HALT
00D0: 30 HALT
00D1: 30 HALT
00D2: 30 HALT
00D3: 30 HALT
00D4: 30 HALT
00D5: 30 HALT
00D6: 30 HALT
00D7: 30 HALT
00D8: 30 HALT
00D9: 30 HALT
00DA: 30 HALT
00DB: 30 HALT
00DC: 30 HALT
00DD: 30 HALT
00DE: 30 HALT
00DF: 30 HALT
00E0: 30 HALT
00E1: 30 HALT
00E2: 30 HALT
00E3: 30 HALT
00E4: 30 HALT
00E5: 30 HALT
00E6: 30 HALT
00E7: 30 HALT
00E8: 30 HALT
00E9: 30 HALT
00EA: 30 HALT
00EB: 30 HALT
00EC: 30 HALT
00ED: 30 HALT
00EE: 30 HALT
00EF: 30 HALT
00F0: 30 HALT
00F1: 30 HALT
00F2: 30 HALT
00F3: 30 HALT
00F4: 30 HALT
00F5: 30 HALT
00F6: 30 HALT
00F7: 30 HALT
00F8: 30 HALT
00F9: 30 HALT
00FA: 30 HALT
00FB: 30 HALT
00FC: 30 HALT
00FD: 30 HALT
00FE: 30 HALT
00FF: 30 HALT
0100: 30 HALT
0101: 30 HALT
0102: 30 HALT
0103: 30 HALT
0104: 30 HALT
0105: 30 HALT
0106: 30 HALT
0107: 30 HALT
0108: 30 HALT
0109: 30 HALT
010A: 30 HALT
010B: 30 HALT
010C: 30 HALT
010D: 30 HALT
010E: 30 HALT
010F: 30 HALT
0110: 30 HALT
0111: 30 HALT
0112: 30 HALT
0113: 30 HALT
0114: 30 HALT
0115: 30 HALT
0116: 30 HALT
0117: 30 HALT
0118: 30 HALT
0119: 30 HALT
011A: 30 HALT
011B: 30 HALT
011C: 30 HALT
011D: 30 HALT
011E: 30 HALT
011F: 30 HALT
0120: 30 HALT
0121: 30 HALT
0122: 30 HALT
0123: 30 HALT
0124: 30 HALT
0125: 30 HALT
0126: 30 HALT
0127: 30 HALT
0128: 30 HALT
0129: 30 HALT
012A: 30 HALT
012B: 30 HALT
012C: 30 HALT
012D: 30 HALT
012E: 30 HALT
012F: 30 HALT
0130: 30 HALT
0131: 30 HALT
0132: 30 HALT
0133: 30 HALT
0134: 30 HALT
0135: 30 HALT
0136: 30 HALT
0137: 30 HALT
0138: 30 HALT
0139: 30 HALT
013A: 30 HALT
013B: 30 HALT
013C: 30 HALT
013D: 30 HALT
013E: 30 HALT
013F: 30 HALT
0140: 30 HALT
0141: 30 HALT
0142: 30 HALT
0143: 30 HALT
0144: 30 HALT
0145: 30 HALT
0146: 30 HALT
0147: 30 HALT
0148: 30 HALT
0149: 30 HALT
014A: 30 HALT
014B: 30 HALT
014C: 30 HALT
014D: 30 HALT
014E: 30 HALT
014F: 30 HALT
0150: 01 01 ADD A,1
0152: 55 01 D8 MOV [1],216
0155: 01 01 ADD A,1
0157: 60 01 MOV REG[1],A
0159: 5A 01 MOV [1],X
015B: 62 01 77 MOV REG[1],119
015E: 01 66 ADD A,102
0160: 80 80 JMP 0x01E1
0162: 01 88 ADD A,136
0164: 01 B0 ADD A,176
0166: 01 00 ADD A,0
0168: 00 SWI
0169: 09 08 ADC A,8
016B: 6F 00 RRC [X+0]
016D: 00 SWI
016E: DE 00 JNC 0xFF6F
0170: 00 SWI
0171: 09 08 ADC A,8
0173: 88 00 JMP 0xF974
0175: 00 SWI
0176: DE 01 JNC 0xFF78
0178: 00 SWI
0179: 00 SWI
017A: 3F 08 MVI [8],A
017C: CA 00 JC 0xFB7D
017E: 00 SWI
017F: DE 00 JNC 0xFF80
0181: 00 SWI
0182: 3F 08 MVI [8],A
0184: CA 00 JC 0xFB85
0186: 00 SWI
0187: DE 04 JNC 0xFF8C
0189: 01 95 ADD A,149
018B: 00 SWI
018C: 00 SWI
018D: 01 9E ADD A,158
018F: 00 SWI
0190: 00 SWI
0191: 01 A7 ADD A,167
0193: 00 SWI
0194: 00 SWI
0195: 00 SWI
0196: 01 00 ADD A,0
0198: 08 PUSH A
0199: 00 SWI
019A: 71 00 OR F,0
019C: 00 SWI
019D: DE 00 JNC 0xFF9E
019F: 01 00 ADD A,0
01A1: 08 PUSH A
01A2: 00 SWI
01A3: 79 DEC X
01A4: 00 SWI
01A5: 00 SWI
01A6: DE 00 JNC 0xFFA7
01A8: 01 00 ADD A,0
01AA: 00 SWI
01AB: 00 SWI
01AC: 81 00 JMP 0x02AD
01AE: 00 SWI
01AF: DE 04 JNC 0xFFB4
01B1: 01 BD ADD A,189
01B3: 00 SWI
01B4: 00 SWI
01B5: 01 C6 ADD A,198
01B7: 00 SWI
01B8: 00 SWI
01B9: 01 CF ADD A,207
01BB: 00 SWI
01BC: 00 SWI
01BD: 00 SWI
01BE: 01 00 ADD A,0
01C0: 08 PUSH A
01C1: 00 SWI
01C2: 89 00 JMP 0xFAC3
01C4: 00 SWI
01C5: DE 00 JNC 0xFFC6
01C7: 01 00 ADD A,0
01C9: 08 PUSH A
01CA: 00 SWI
01CB: 91 00 CALL 0x02CD
01CD: 00 SWI
01CE: DE 00 JNC 0xFFCF
01D0: 01 00 ADD A,0
01D2: 00 SWI
01D3: 00 SWI
01D4: 99 00 CALL 0xFAD6
01D6: 00 SWI
01D7: DE 00 JNC 0xFFD8
01D9: 00 SWI
01DA: 00 SWI
01DB: 3B 08 CMP A,[X+8]
01DD: 5D 00 MOV A,REG[0]
01DF: 00 SWI
01E0: DE 00 JNC 0xFFE1
01E2: 00 SWI
01E3: 00 SWI
01E4: 12 08 SUB A,[8]
01E6: 4B SWAP A,X
01E7: 00 SWI
01E8: 00 SWI
01E9: DE 70 JNC 0x005A
FILE: lib\psocconfigtbl.asm
(0001) ; Generated by PSoC Designer ver 4.2 b1013 : 02 September, 2004
(0002) ;
(0003) include "m8c.inc"
(0004) ; Personalization tables
(0005) export LoadConfigTBL_p1
(0006) AREA psoc_config(rom, rel)
(0007) LoadConfigTBL_p1:
(0008) ; Ordered Global Register values
(0009) M8C_SetBank0
01EB: EF 62 JACC 0x014E
(0010) ; Global Register values
(0011) mov reg[32h], 00h ; CLKIOCR register (CLKIOCR)
01ED: 32 00 XOR A,[__r0]
(0012) mov reg[30h], 00h ; CPUCLKCR register (CPUCLKCR)
01EF: 62 30 00 MOV REG[48],0
(0013) mov reg[05h], 00h ; P00CR register (P00CR)
01F2: 62 05 00 MOV REG[5],0
(0014) mov reg[06h], 00h ; P01CR register (P01CR)
01F5: 62 06 00 MOV REG[6],0
(0015) mov reg[07h], 00h ; P02CR register (P02CR)
01F8: 62 07 00 MOV REG[7],0
(0016) mov reg[08h], 00h ; P03CR register (P03CR)
01FB: 62 08 00 MOV REG[8],0
(0017) mov reg[09h], 00h ; P04CR register (P04CR)
01FE: 62 09 00 MOV REG[9],0
(0018) mov reg[0ah], 00h ; P05CR register (P05CR)
0201: 62 0A 00 MOV REG[10],0
(0019) mov reg[0bh], 00h ; P06CR register (P06CR)
0204: 62 0B 00 MOV REG[11],0
(0020) mov reg[0ch], 00h ; P07CR register (P07CR)
0207: 62 0C 00 MOV REG[12],0
(0021) mov reg[0dh], 00h ; P10CR register (P10CR)
020A: 62 0D 00 MOV REG[13],0
(0022) mov reg[0eh], 00h ; P11CR register (P11CR)
020D: 62 0E 00 MOV REG[14],0
(0023) mov reg[0fh], 00h ; P12CR register (P12CR)
0210: 62 0F 00 MOV REG[15],0
(0024) mov reg[10h], 00h ; P13CR register (P13CR)
0213: 62 10 00 MOV REG[16],0
(0025) mov reg[11h], 00h ; P14CR register (P14CR)
0216: 62 11 00 MOV REG[17],0
(0026) mov reg[12h], 00h ; P15CR register (P15CR)
0219: 62 12 00 MOV REG[18],0
(0027) mov reg[13h], 00h ; P16CR register (P16CR)
021C: 62 13 00 MOV REG[19],0
(0028) mov reg[14h], 00h ; P17CR register (P17CR)
021F: 62 14 00 MOV REG[20],0
(0029) mov reg[15h], 00h ; P20CR register (P20CR)
0222: 62 15 00 MOV REG[21],0
(0030) mov reg[16h], 00h ; P30CR register (P30CR)
0225: 62 16 00 MOV REG[22],0
(0031) mov reg[3dh], 00h ; SPICR register (SPICR)
0228: 62 3D 00 MOV REG[61],0
(0032) mov reg[2bh], 00h ; TCAPINTE register (TCAPINTE)
022B: 62 2B 00 MOV REG[43],0
(0033) mov reg[31h], 8fh ; TMRCLKCR register (TMRCLKCR)
022E: 62 31 8F MOV REG[49],143
(0034) mov reg[2ah], 00h ; TMRCR register (TMRCR)
0231: 62 2A 00 MOV REG[42],0
(0035) mov reg[73h], 00h ; VREGCR register (VREGCR)
0234: 62 73 00 MOV REG[115],0
(0036) ; Instance name MSTIMER, User Module MSTIMER
(0037) ; Instance name myUSB, User Module USB
(0038) M8C_SetBank1
0237: 71 10 OR F,16
(0039) ; Global Register values
(0040) mov reg[e0h], 03h ; OSC_CR0 register (OSC_CR0)
0239: 62 E0 03 MOV REG[224],3
(0041) mov reg[e3h], 14h ; VLDCR register (VLDCR)
023C: 62 E3 14 MOV REG[227],20
(0042) ; Instance name MSTIMER, User Module MSTIMER
(0043) ; Instance name myUSB, User Module USB
(0044) M8C_SetBank0
023F: 70 EF AND F,239
(0045) ret
0241: 7F RET
FILE: lib\psocconfig.asm
(0001) ; Generated by PSoC Designer ver 4.2 b1013 : 02 September, 2004
(0002) ;
(0003) ;==========================================================================
(0004) ; PSoCConfig.asm
(0005) ; @PSOC_VERSION
(0006) ;
(0007) ; Version: 0.85
(0008) ; Revised: June 22, 2004
(0009) ; Copyright Cypress MicroSystems 2000-2004. All Rights Reserved.
(0010) ;
(0011) ; This file is generated by the Device Editor on Application Generation.
(0012) ; It contains code which loads the configuration data table generated in
(0013) ; the file PSoCConfigTBL.asm
(0014) ;
(0015) ; DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!!
(0016) ; Edits to this file will not be preserved.
(0017) ;==========================================================================
(0018) ;
(0019) include "m8c.inc"
(0020) include "memory.inc"
(0021) include "GlobalParams.inc"
(0022)
(0023) export LoadConfigInit
(0024) export _LoadConfigInit
(0025) export LoadConfig_p1
(0026) export _LoadConfig_p1
(0027) export Port_1_Data_SHADE
(0028) export _Port_1_Data_SHADE
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -