24c512b.hpl

schematic interface orange for eeprom programming

; Orange programmer module v2.0
; (c) 1999 Alex Plusov
; CHIP=24C32 (4096x8), 24C65 (8192x8), 24C128 (16384x8),
; 24C256(32768x8), 24C512(65535x8)
; Page read/write support

SOCKET=1 ;"I2C"

PINO=SCL,0
PINO=SDA,1
PINO=WP, 2
PINO=A0, 3
PINO=A1, 4
PINO=A2, 5
PINI=SDA,1

CDELAY=2 ; one cycle time

[INIT]
A0=0,A1=0,A2=0


[READ]
SDA=1,SCL=1,SDA=0,SCL=0               ; start

CONST=0xA0
LOOP=CONST(7,0) {SDA=I,SCL=1,SCL=0} ; out 8 bits
SDA=1,SCL=1,SDA?0              ; ack check
SCL=0,SDA=0

LOOP=(15,8) {SDA=ADR[I],SCL=1,SCL=0}  ; out 8 bits adr Hi
SDA=1,SCL=1,SDA?0              ; ack check
SCL=0,SDA=0

LOOP=(7,0)  {SDA=ADR[I],SCL=1,SCL=0} ; out 8 bits adr Lo
SDA=1,SCL=1,SDA?0              ; ack check
SCL=0,SDA=0

SDA=1,SCL=1,SDA=0,SCL=0 ;start
CONST=0xA1
LOOP=CONST(7,0) {SDA=I,SCL=1,SCL=0} ; out 8 bits
SDA=1,SCL=1,SDA?0              ; ack check
SCL=0
SDA=1
LOOP=(7,0){SCL=1,DATA[I]=SDA,SCL=0} ;read byte
SDA=1,SCL=1,SCL=0        ; no ack

SDA=0,SCL=0,SCL=1,SDA=1 ;stop


[READBLOCK]
SDA=1,SCL=1,SDA=0,SCL=0               ; start

CONST=0xA0
LOOP=CONST(7,0) {SDA=I,SCL=1,SCL=0} ; out 8 bits
SDA=1,SCL=1,SDA?0              ; ack check
SCL=0,SDA=0

LOOP=(15,8) {SDA=ADR[I],SCL=1,SCL=0}  ; out 8 bits adr Hi
SDA=1,SCL=1,SDA?0              ; ack check
SCL=0,SDA=0

LOOP=(7,0)  {SDA=ADR[I],SCL=1,SCL=0} ; out 8 bits adr Lo
SDA=1,SCL=1,SDA?0              ; ack check
SCL=0,SDA=0

SDA=1,SCL=1,SDA=0,SCL=0 ;start
CONST=0xA1
LOOP=CONST(7,0) {SDA=I,SCL=1,SCL=0} ; out 8 bits
SDA=1,SCL=1,SDA?0              ; ack check
SCL=0,SDA=0

;[READBLK]
R0=2
LOOP=(R0,RB){
SDA=1
LOOP=(7,0){SCL=1,DATA[I]=SDA,SCL=0} ;read byte
SDA=0,SCL=1,SCL=0 ;ack
ADR=+1

}

SDA=1
LOOP=(7,0){SCL=1,DATA[I]=SDA,SCL=0} ;read last byte
SDA=1,SCL=1,SCL=0 ;no ack
SDA=0,SCL=0,SCL=1,SDA=1,SCL=0;stop


[WRITE]
WP=0
SDA=1,SCL=1,SDA=0,SCL=0 ;start

CONST=0xA0
LOOP=CONST(7,0) {SDA=I,SCL=1,SCL=0} ; out 8 bits
SDA=1,SCL=1,SDA?0              ; ack check
SCL=0,SDA=0

LOOP=(15,8)  {SDA=ADR[I],SCL=1,SCL=0} ; out 8 bits adr Hi
SDA=1,SCL=1,SDA?0             ; ack check
SCL=0,SDA=0

LOOP=(7,0)  {SDA=ADR[I],SCL=1,SCL=0} ; out 8 bits adr Lo
SDA=1,SCL=1,SDA?0             ; ack check
SCL=0

LOOP=(7,0){SDA=DATA[I],SCL=1,SCL=0}   ; write byte
SDA=1,SCL=1,SDA?0             ; ack check
SCL=0,SDA=0
SCL=0,SCL=1,SDA=1 ;stop
P=5000                        ; write delay


[WRITEBLOCK]
WP=0
SDA=1,SCL=1,SDA=0,SCL=0 ;start

CONST=0xA0
LOOP=CONST(7,0) {SDA=I,SCL=1,SCL=0} ; out 8 bits
SDA=1,SCL=1,SDA?0              ; ack check
SCL=0,SDA=0

LOOP=(15,8)  {SDA=ADR[I],SCL=1,SCL=0} ; out 8 bits adr Hi
SDA=1,SCL=1,SDA?0             ; ack check
SCL=0,SDA=0

LOOP=(7,0)  {SDA=ADR[I],SCL=1,SCL=0} ; out 8 bits adr Lo
SDA=1,SCL=1,SDA?0             ; ack check
SCL=0,SDA=0

R0=1
LOOP=(R0,RB){
LOOP=(7,0){SDA=DATA[I],SCL=1,SCL=0}   ; write byte
SDA=1,SCL=1,SDA?0,SCL=0               ; ack check
ADR=+1;
}

SCL=0,SDA=0
SCL=0,SCL=1,SDA=1 ;stop
P=5000                        ; write delay