x24c01.hpl

schematic interface orange for eeprom programming

; Orange programmer module v1.2
; June 03. 2000  V. G.
; CHIP=X24C01 (128x8)
; X24C01 (XICOR), AT24C01 (ATMEL)

SOCKET=1

PINO=SCL,0
PINO=SDA,1
PINO=TEST,2
PINO=A0, 3
PINO=A1, 4
PINO=A2, 5
PINI=SDA,1

CDELAY = 4                           ; one set delay


[INIT]                               ; Section  RESET  ( EEPROM  ATMEL )
A0=0,A1=0,A2=0
TEST=0                               ; pin TEST = 0  (Dont't care XICOR)
P=10
SCL=0,SDA=1                          ; set SDA=1
LOOP=CONST(8,0) {SCL=1,SCL=0}        ; out 9 CLK  ( DATA SHEET ATMEL )
SCL=0,SDA=0,SCL=1,SDA=1              ; Stop


[READ]
TEST=0
P=10
SDA=1,SCL=1,SDA=0,SCL=0              ; Start

LOOP=ADR(6,0) {SDA=I,SCL=1,SCL=0}    ; out 7 bits  Adr
SDA=1,SCL=1,SCL=0                    ; out 1 bit,  1=Read Mode
SDA=1,SCL=1,SDA?0                    ; ACKN check
SCL=0                                ; end  out  Adr

LOOP=DATA(7,0) {SCL=1,I=SDA,SCL=0}   ; read  byte   Data
SDA=1,SCL=1,SCL=0                    ; out  master  NO_ACKN

SCL=0,SDA=0,SCL=1,SDA=1              ; Stop


[WRITE]
TEST=0
P=10
SDA=1,SCL=1,SDA=0,SCL=0              ; Start

LOOP=ADR(6,0) {SDA=I,SCL=1,SCL=0}    ; out 7 bits  Adr
SDA=0,SCL=1,SCL=0                    ; out 1 bit,  0=Write Mode
SDA=1,SCL=1,SDA?0                    ; ACKN  check
SCL=0                                ; end  out  Adr

LOOP=DATA(7,0) {SDA=I,SCL=1,SCL=0}   ; out 8 bits  Data
SDA=1,SCL=1,SDA?0                    ; ACKN  check
SCL=0                                ; end  out  Data

SCL=0,SDA=0,SCL=1,SDA=1              ; Stop  (WriteBegin)

P=5000,P=5000                        ; delay: 5 ms + 5 ms (Write Time)