📄 fw.lst
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C51 COMPILER V7.02b FW 07/11/2004 12:05:27 PAGE 1
C51 COMPILER V7.02b, COMPILATION OF MODULE FW
OBJECT MODULE PLACED IN fw.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE fw.c BROWSE DEBUG OBJECTEXTEND
stmt level source
1 //-----------------------------------------------------------------------------
2 // File: fw.c
3 // Contents: Firmware frameworks task dispatcher and device request parser
4 // source.
5 //
6 // indent 3. NO TABS!
7 //
8 // $Revision: 18 $
9 // $Date: 12/04/01 5:33p $
10 //
11 // Copyright (c) 1997 AnchorChips, Inc. All rights reserved
12 //-----------------------------------------------------------------------------
13 #include "fx2.h"
14 #include "fx2regs.h"
15 #include "io.h"
16 #include "gpif.h"
17 #include "serial.h"
18 //-----------------------------------------------------------------------------
19 // Constants
20 //-----------------------------------------------------------------------------
21 #define DELAY_COUNT 0x9248*8L // Delay for 8 sec at 24Mhz, 4 sec at 48
22 #define _IFREQ 48000 // IFCLK constant for Synchronization Delay
23 #define _CFREQ 48000 // CLKOUT constant for Synchronization Delay
24
25 //-----------------------------------------------------------------------------
26 // Random Macros
27 //-----------------------------------------------------------------------------
28 #define min(a,b) (((a)<(b))?(a):(b))
29 #define max(a,b) (((a)>(b))?(a):(b))
30
31 // Registers which require a synchronization delay, see section 15.14
32 // FIFORESET FIFOPINPOLAR
33 // INPKTEND OUTPKTEND
34 // EPxBCH:L REVCTL
35 // GPIFTCB3 GPIFTCB2
36 // GPIFTCB1 GPIFTCB0
37 // EPxFIFOPFH:L EPxAUTOINLENH:L
38 // EPxFIFOCFG EPxGPIFFLGSEL
39 // PINFLAGSxx EPxFIFOIRQ
40 // EPxFIFOIE GPIFIRQ
41 // GPIFIE GPIFADRH:L
42 // UDMACRCH:L EPxGPIFTRIG
43 // GPIFTRIG
44
45 // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
46 // ...these have been replaced by GPIFTC[B3:B0] registers
47
48 #include "fx2sdly.h" // Define _IFREQ and _CFREQ above this #include
49
50 //-----------------------------------------------------------------------------
51 // Global Variables
52 //-----------------------------------------------------------------------------
53 volatile BOOL GotSUD;
54 BOOL Rwuen;
55 BOOL Selfpwr;
C51 COMPILER V7.02b FW 07/11/2004 12:05:27 PAGE 2
56 volatile BOOL Sleep; // Sleep mode enable flag
57
58 WORD pDeviceDscr; // Pointer to Device Descriptor; Descriptors may be moved
59 WORD pDeviceQualDscr;
60 WORD pHighSpeedConfigDscr;
61 WORD pFullSpeedConfigDscr;
62 WORD pConfigDscr;
63 WORD pOtherConfigDscr;
64 WORD pStringDscr;
65
66 //-----------------------------------------------------------------------------
67 // Prototypes
68 //-----------------------------------------------------------------------------
69 void SetupCommand(void);
70 void TD_Init(void);
71 void TD_Poll(void);
72 BOOL TD_Suspend(void);
73 BOOL TD_Resume(void);
74
75 BOOL DR_GetDescriptor(void);
76 BOOL DR_SetConfiguration(void);
77 BOOL DR_GetConfiguration(void);
78 BOOL DR_SetInterface(void);
79 BOOL DR_GetInterface(void);
80 BOOL DR_GetStatus(void);
81 BOOL DR_ClearFeature(void);
82 BOOL DR_SetFeature(void);
83 BOOL DR_VendorCmnd(void);
84
85 // this table is used by the epcs macro
86 const char code EPCS_Offset_Lookup_Table[] =
87 {
88 0, // EP1OUT
89 1, // EP1IN
90 2, // EP2OUT
91 2, // EP2IN
92 3, // EP4OUT
93 3, // EP4IN
94 4, // EP6OUT
95 4, // EP6IN
96 5, // EP8OUT
97 5, // EP8IN
98 };
99
100 // macro for generating the address of an endpoint's control and status register (EPnCS)
101 #define epcs(EP) (EPCS_Offset_Lookup_Table[(EP & 0x7E) | (EP > 128)] + 0xE6A1)
102
103 //-----------------------------------------------------------------------------
104 // Code
105 //-----------------------------------------------------------------------------
106
107 // Task dispatcher
108 void main(void)
109 {
110 1 DWORD i;
111 1 WORD offset;
112 1 DWORD DevDescrLen;
113 1 DWORD j=0;
114 1 WORD IntDescrAddr;
115 1 WORD ExtDescrAddr;
116 1 WORD GpifLowAddr;
117 1 BYTE GpifHighAddr;
C51 COMPILER V7.02b FW 07/11/2004 12:05:27 PAGE 3
118 1 BYTE xdata GpifReadData;
119 1 BYTE GpifWriteData;
120 1 BYTE GpifTestFlag;
121 1
122 1 // Initialize Global States
123 1 Sleep = FALSE; // Disable sleep mode
124 1 Rwuen = FALSE; // Disable remote wakeup
125 1 Selfpwr = FALSE; // Disable self powered
126 1 GotSUD = FALSE; // Clear "Got setup data" flag
127 1
128 1 GpifLowAddr = 0;
129 1 GpifHighAddr = 0;
130 1 GpifWriteData = 0;
131 1 *GA = GpifHighAddr;
132 1 Peripheral_SetAddress(GpifLowAddr); //set low address
133 1 GpifTestFlag = 0;
134 1 // Initialize user device
135 1 TD_Init();
136 1 IO_Init();
137 1 REG_Init();
138 1 // The following section of code is used to relocate the descriptor table.
139 1 // Since the SUDPTRH and SUDPTRL are assigned the address of the descriptor
140 1 // table, the descriptor table must be located in on-part memory.
141 1 // The 4K demo tools locate all code sections in external memory.
142 1 // The descriptor table is relocated by the frameworks ONLY if it is found
143 1 // to be located in external memory.
144 1 pDeviceDscr = (WORD)&DeviceDscr;
145 1 pDeviceQualDscr = (WORD)&DeviceQualDscr;
146 1 pHighSpeedConfigDscr = (WORD)&HighSpeedConfigDscr;
147 1 pFullSpeedConfigDscr = (WORD)&FullSpeedConfigDscr;
148 1 pStringDscr = (WORD)&StringDscr;
149 1
150 1 if ((WORD)&DeviceDscr & 0xe000)
151 1 {
152 2 IntDescrAddr = INTERNAL_DSCR_ADDR;
153 2 ExtDescrAddr = (WORD)&DeviceDscr;
154 2 DevDescrLen = (WORD)&UserDscr - (WORD)&DeviceDscr + 2;
155 2 for (i = 0; i < DevDescrLen; i++)
156 2 *((BYTE xdata *)IntDescrAddr+i) = 0xCD;
157 2 for (i = 0; i < DevDescrLen; i++)
158 2 *((BYTE xdata *)IntDescrAddr+i) = *((BYTE xdata *)ExtDescrAddr+i);
159 2 pDeviceDscr = IntDescrAddr;
160 2 offset = (WORD)&DeviceDscr - INTERNAL_DSCR_ADDR;
161 2 pDeviceQualDscr -= offset;
162 2 pConfigDscr -= offset;
163 2 pOtherConfigDscr -= offset;
164 2 pHighSpeedConfigDscr -= offset;
165 2 pFullSpeedConfigDscr -= offset;
166 2 pStringDscr -= offset;
167 2 }
168 1
169 1 EZUSB_IRQ_ENABLE(); // Enable USB interrupt (INT2)
170 1 EZUSB_ENABLE_RSMIRQ(); // Wake-up interrupt
171 1
172 1 INTSETUP |= (bmAV2EN | bmAV4EN); // Enable INT 2 & 4 autovectoring
173 1
174 1 USBIE |= bmSUDAV | bmSUTOK | bmSUSP | bmURES | bmHSGRANT; // Enable selected interrupts
175 1
176 1 SerialPort_Init();
177 1 EA = 1; // Enable 8051 interrupts
178 1
179 1 #ifndef NO_RENUM
C51 COMPILER V7.02b FW 07/11/2004 12:05:27 PAGE 4
180 1 // Renumerate if necessary. Do this by checking the renum bit. If it
181 1 // is already set, there is no need to renumerate. The renum bit will
182 1 // already be set if this firmware was loaded from an eeprom.
183 1 if(!(USBCS & bmRENUM))
184 1 {
185 2 EZUSB_Discon(TRUE); // renumerate
186 2 }
187 1 #endif
188 1
189 1 // unconditionally re-connect. If we loaded from eeprom we are
190 1 // disconnected and need to connect. If we just renumerated this
191 1 // is not necessary but doesn't hurt anything
192 1 USBCS &=~bmDISCON;
193 1
194 1 CKCON = (CKCON&(~bmSTRETCH)) | FW_STRETCH_VALUE; // Set stretch to 0 (after renumeration)
195 1
196 1 // clear the Sleep flag.
197 1 Sleep = FALSE;
198 1 Serial_SendString((BYTE xdata *)"\rTest Start\r",12,0);
199 1 // Task Dispatcher
200 1 while(TRUE) // Main Loop
201 1 {
202 2 if(GotSUD) // Wait for SUDAV
203 2 {
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