📄 fw.lst
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C51 COMPILER V7.02b FW 06/30/2004 15:13:17 PAGE 1
C51 COMPILER V7.02b, COMPILATION OF MODULE FW
OBJECT MODULE PLACED IN fw.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE fw.c BROWSE DEBUG OBJECTEXTEND
stmt level source
1 //-----------------------------------------------------------------------------
2 // File: fw.c
3 // Contents: Firmware frameworks task dispatcher and device request parser
4 // source.
5 //
6 // indent 3. NO TABS!
7 //
8 // $Revision: 18 $
9 // $Date: 12/04/01 5:33p $
10 //
11 // Copyright (c) 1997 AnchorChips, Inc. All rights reserved
12 //-----------------------------------------------------------------------------
13 #include "fx2.h"
14 #include "fx2regs.h"
15 #include "string.h"
16 #include "io.h"
17 #include "key.h"
18 #include "led.h"
19 #include "serial.h"
20 #include "eeprom.h"
21
22 //-----------------------------------------------------------------------------
23 // Constants
24 //-----------------------------------------------------------------------------
25 #define DELAY_COUNT 0x9248*8L // Delay for 8 sec at 24Mhz, 4 sec at 48
26 #define _IFREQ 48000 // IFCLK constant for Synchronization Delay
27 #define _CFREQ 48000 // CLKOUT constant for Synchronization Delay
28
29 //-----------------------------------------------------------------------------
30 // Random Macros
31 //-----------------------------------------------------------------------------
32 #define min(a,b) (((a)<(b))?(a):(b))
33 #define max(a,b) (((a)>(b))?(a):(b))
34
35 // Registers which require a synchronization delay, see section 15.14
36 // FIFORESET FIFOPINPOLAR
37 // INPKTEND OUTPKTEND
38 // EPxBCH:L REVCTL
39 // GPIFTCB3 GPIFTCB2
40 // GPIFTCB1 GPIFTCB0
41 // EPxFIFOPFH:L EPxAUTOINLENH:L
42 // EPxFIFOCFG EPxGPIFFLGSEL
43 // PINFLAGSxx EPxFIFOIRQ
44 // EPxFIFOIE GPIFIRQ
45 // GPIFIE GPIFADRH:L
46 // UDMACRCH:L EPxGPIFTRIG
47 // GPIFTRIG
48
49 // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
50 // ...these have been replaced by GPIFTC[B3:B0] registers
51
52 #include "fx2sdly.h" // Define _IFREQ and _CFREQ above this #include
53
54 //-----------------------------------------------------------------------------
55 // Global Variables
C51 COMPILER V7.02b FW 06/30/2004 15:13:17 PAGE 2
56 //-----------------------------------------------------------------------------
57 volatile BOOL GotSUD;
58 BOOL Rwuen;
59 BOOL Selfpwr;
60 volatile BOOL Sleep; // Sleep mode enable flag
61
62 WORD pDeviceDscr; // Pointer to Device Descriptor; Descriptors may be moved
63 WORD pDeviceQualDscr;
64 WORD pHighSpeedConfigDscr;
65 WORD pFullSpeedConfigDscr;
66 WORD pConfigDscr;
67 WORD pOtherConfigDscr;
68 WORD pStringDscr;
69
70
71 //-----------------------------------------------------------------------------
72 // Prototypes
73 //-----------------------------------------------------------------------------
74 void SetupCommand(void);
75 void TD_Init(void);
76 void TD_Poll(void);
77 BOOL TD_Suspend(void);
78 BOOL TD_Resume(void);
79
80 BOOL DR_GetDescriptor(void);
81 BOOL DR_SetConfiguration(void);
82 BOOL DR_GetConfiguration(void);
83 BOOL DR_SetInterface(void);
84 BOOL DR_GetInterface(void);
85 BOOL DR_GetStatus(void);
86 BOOL DR_ClearFeature(void);
87 BOOL DR_SetFeature(void);
88 BOOL DR_VendorCmnd(void);
89
90 // this table is used by the epcs macro
91 const char code EPCS_Offset_Lookup_Table[] =
92 {
93 0, // EP1OUT
94 1, // EP1IN
95 2, // EP2OUT
96 2, // EP2IN
97 3, // EP4OUT
98 3, // EP4IN
99 4, // EP6OUT
100 4, // EP6IN
101 5, // EP8OUT
102 5, // EP8IN
103 };
104
105 // macro for generating the address of an endpoint's control and status register (EPnCS)
106 #define epcs(EP) (EPCS_Offset_Lookup_Table[(EP & 0x7E) | (EP > 128)] + 0xE6A1)
107
108 //-----------------------------------------------------------------------------
109 // Code
110 //-----------------------------------------------------------------------------
111
112 // Task dispatcher
113 void main(void)
114 {
115 1 DWORD i;
116 1 WORD offset;
117 1 DWORD DevDescrLen;
C51 COMPILER V7.02b FW 06/30/2004 15:13:17 PAGE 3
118 1 DWORD j=0;
119 1 WORD IntDescrAddr;
120 1 WORD ExtDescrAddr;
121 1 BYTE temp_data;
122 1
123 1 // Initialize Global States
124 1 Sleep = FALSE; // Disable sleep mode
125 1 Rwuen = FALSE; // Disable remote wakeup
126 1 Selfpwr = FALSE; // Disable self powered
127 1 GotSUD = FALSE; // Clear "Got setup data" flag
128 1
129 1 // Initialize user device
130 1 TD_Init();
131 1
132 1 //////user init/////
133 1 IO_Init();
134 1 REG_Init();
135 1 OKey_RP_Init();
136 1 Disp_Init();
137 1 EEPROMInit();
138 1
139 1 // The following section of code is used to relocate the descriptor table.
140 1 // Since the SUDPTRH and SUDPTRL are assigned the address of the descriptor
141 1 // table, the descriptor table must be located in on-part memory.
142 1 // The 4K demo tools locate all code sections in external memory.
143 1 // The descriptor table is relocated by the frameworks ONLY if it is found
144 1 // to be located in external memory.
145 1 pDeviceDscr = (WORD)&DeviceDscr;
146 1 pDeviceQualDscr = (WORD)&DeviceQualDscr;
147 1 pHighSpeedConfigDscr = (WORD)&HighSpeedConfigDscr;
148 1 pFullSpeedConfigDscr = (WORD)&FullSpeedConfigDscr;
149 1 pStringDscr = (WORD)&StringDscr;
150 1
151 1 if ((WORD)&DeviceDscr & 0xe000)
152 1 {
153 2 IntDescrAddr = INTERNAL_DSCR_ADDR;
154 2 ExtDescrAddr = (WORD)&DeviceDscr;
155 2 DevDescrLen = (WORD)&UserDscr - (WORD)&DeviceDscr + 2;
156 2 for (i = 0; i < DevDescrLen; i++)
157 2 *((BYTE xdata *)IntDescrAddr+i) = 0xCD;
158 2 for (i = 0; i < DevDescrLen; i++)
159 2 *((BYTE xdata *)IntDescrAddr+i) = *((BYTE xdata *)ExtDescrAddr+i);
160 2 pDeviceDscr = IntDescrAddr;
161 2 offset = (WORD)&DeviceDscr - INTERNAL_DSCR_ADDR;
162 2 pDeviceQualDscr -= offset;
163 2 pConfigDscr -= offset;
164 2 pOtherConfigDscr -= offset;
165 2 pHighSpeedConfigDscr -= offset;
166 2 pFullSpeedConfigDscr -= offset;
167 2 pStringDscr -= offset;
168 2 }
169 1
170 1 EZUSB_IRQ_ENABLE(); // Enable USB interrupt (INT2)
171 1 EZUSB_ENABLE_RSMIRQ(); // Wake-up interrupt
172 1
173 1 INTSETUP |= (bmAV2EN | bmAV4EN); // Enable INT 2 & 4 autovectoring
174 1
175 1 USBIE |= bmSUDAV | bmSUTOK | bmSUSP | bmURES | bmHSGRANT; // Enable selected interrupts
176 1 /////////user init///////////
177 1 SerialPort_Init();
178 1 /////////////////////////////
179 1 EA = 1; // Enable 8051 interrupts
C51 COMPILER V7.02b FW 06/30/2004 15:13:17 PAGE 4
180 1 #ifndef NO_RENUM
181 1 // Renumerate if necessary. Do this by checking the renum bit. If it
182 1 // is already set, there is no need to renumerate. The renum bit will
183 1 // already be set if this firmware was loaded from an eeprom.
184 1 if(!(USBCS & bmRENUM))
185 1 {
186 2 EZUSB_Discon(TRUE); // renumerate
187 2 }
188 1 #endif
189 1
190 1 // unconditionally re-connect. If we loaded from eeprom we are
191 1 // disconnected and need to connect. If we just renumerated this
192 1 // is not necessary but doesn't hurt anything
193 1 USBCS &=~bmDISCON;
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