at91sam7a3.inc

ucosII 操作系统在at91sam7a3单片机上的实现。

CAN_TCR         #  4 ;- Transfer Command Register
CAN_ACR         #  4 ;- Abort Command Register
                # 208 ;- Reserved
CAN_VR          #  4 ;- Version Register
                # 256 ;- Reserved
CAN_MB0         # 32 ;- CAN Mailbox 0
CAN_MB1         # 32 ;- CAN Mailbox 1
CAN_MB2         # 32 ;- CAN Mailbox 2
CAN_MB3         # 32 ;- CAN Mailbox 3
CAN_MB4         # 32 ;- CAN Mailbox 4
CAN_MB5         # 32 ;- CAN Mailbox 5
CAN_MB6         # 32 ;- CAN Mailbox 6
CAN_MB7         # 32 ;- CAN Mailbox 7
CAN_MB8         # 32 ;- CAN Mailbox 8
CAN_MB9         # 32 ;- CAN Mailbox 9
CAN_MB10        # 32 ;- CAN Mailbox 10
CAN_MB11        # 32 ;- CAN Mailbox 11
CAN_MB12        # 32 ;- CAN Mailbox 12
CAN_MB13        # 32 ;- CAN Mailbox 13
CAN_MB14        # 32 ;- CAN Mailbox 14
CAN_MB15        # 32 ;- CAN Mailbox 15
;- -------- CAN_MR : (CAN Offset: 0x0) CAN Mode Register -------- 
AT91C_CAN_CANEN           EQU (0x1:SHL:0) ;- (CAN) CAN Controller Enable
AT91C_CAN_LPM             EQU (0x1:SHL:1) ;- (CAN) Disable/Enable Low Power Mode
AT91C_CAN_ABM             EQU (0x1:SHL:2) ;- (CAN) Disable/Enable Autobaud/Listen Mode
AT91C_CAN_OVL             EQU (0x1:SHL:3) ;- (CAN) Disable/Enable Overload Frame
AT91C_CAN_TEOF            EQU (0x1:SHL:4) ;- (CAN) Time Stamp messages at each end of Frame
AT91C_CAN_TTM             EQU (0x1:SHL:5) ;- (CAN) Disable/Enable Time Trigger Mode
AT91C_CAN_TIMFRZ          EQU (0x1:SHL:6) ;- (CAN) Enable Timer Freeze
AT91C_CAN_DRPT            EQU (0x1:SHL:7) ;- (CAN) Disable Repeat
;- -------- CAN_IER : (CAN Offset: 0x4) CAN Interrupt Enable Register -------- 
AT91C_CAN_MB0             EQU (0x1:SHL:0) ;- (CAN) Mailbox 0 Flag
AT91C_CAN_MB1             EQU (0x1:SHL:1) ;- (CAN) Mailbox 1 Flag
AT91C_CAN_MB2             EQU (0x1:SHL:2) ;- (CAN) Mailbox 2 Flag
AT91C_CAN_MB3             EQU (0x1:SHL:3) ;- (CAN) Mailbox 3 Flag
AT91C_CAN_MB4             EQU (0x1:SHL:4) ;- (CAN) Mailbox 4 Flag
AT91C_CAN_MB5             EQU (0x1:SHL:5) ;- (CAN) Mailbox 5 Flag
AT91C_CAN_MB6             EQU (0x1:SHL:6) ;- (CAN) Mailbox 6 Flag
AT91C_CAN_MB7             EQU (0x1:SHL:7) ;- (CAN) Mailbox 7 Flag
AT91C_CAN_MB8             EQU (0x1:SHL:8) ;- (CAN) Mailbox 8 Flag
AT91C_CAN_MB9             EQU (0x1:SHL:9) ;- (CAN) Mailbox 9 Flag
AT91C_CAN_MB10            EQU (0x1:SHL:10) ;- (CAN) Mailbox 10 Flag
AT91C_CAN_MB11            EQU (0x1:SHL:11) ;- (CAN) Mailbox 11 Flag
AT91C_CAN_MB12            EQU (0x1:SHL:12) ;- (CAN) Mailbox 12 Flag
AT91C_CAN_MB13            EQU (0x1:SHL:13) ;- (CAN) Mailbox 13 Flag
AT91C_CAN_MB14            EQU (0x1:SHL:14) ;- (CAN) Mailbox 14 Flag
AT91C_CAN_MB15            EQU (0x1:SHL:15) ;- (CAN) Mailbox 15 Flag
AT91C_CAN_ERRA            EQU (0x1:SHL:16) ;- (CAN) Error Active Mode Flag
AT91C_CAN_WARN            EQU (0x1:SHL:17) ;- (CAN) Warning Limit Flag
AT91C_CAN_ERRP            EQU (0x1:SHL:18) ;- (CAN) Error Passive Mode Flag
AT91C_CAN_BOFF            EQU (0x1:SHL:19) ;- (CAN) Bus Off Mode Flag
AT91C_CAN_SLEEP           EQU (0x1:SHL:20) ;- (CAN) Sleep Flag
AT91C_CAN_WAKEUP          EQU (0x1:SHL:21) ;- (CAN) Wakeup Flag
AT91C_CAN_TOVF            EQU (0x1:SHL:22) ;- (CAN) Timer Overflow Flag
AT91C_CAN_TSTP            EQU (0x1:SHL:23) ;- (CAN) Timestamp Flag
AT91C_CAN_CERR            EQU (0x1:SHL:24) ;- (CAN) CRC Error
AT91C_CAN_SERR            EQU (0x1:SHL:25) ;- (CAN) Stuffing Error
AT91C_CAN_AERR            EQU (0x1:SHL:26) ;- (CAN) Acknowledgment Error
AT91C_CAN_FERR            EQU (0x1:SHL:27) ;- (CAN) Form Error
AT91C_CAN_BERR            EQU (0x1:SHL:28) ;- (CAN) Bit Error
;- -------- CAN_IDR : (CAN Offset: 0x8) CAN Interrupt Disable Register -------- 
;- -------- CAN_IMR : (CAN Offset: 0xc) CAN Interrupt Mask Register -------- 
;- -------- CAN_SR : (CAN Offset: 0x10) CAN Status Register -------- 
AT91C_CAN_RBSY            EQU (0x1:SHL:29) ;- (CAN) Receiver Busy
AT91C_CAN_TBSY            EQU (0x1:SHL:30) ;- (CAN) Transmitter Busy
AT91C_CAN_OVLY            EQU (0x1:SHL:31) ;- (CAN) Overload Busy
;- -------- CAN_BR : (CAN Offset: 0x14) CAN Baudrate Register -------- 
AT91C_CAN_PHASE2          EQU (0x7:SHL:0) ;- (CAN) Phase 2 segment
AT91C_CAN_PHASE1          EQU (0x7:SHL:4) ;- (CAN) Phase 1 segment
AT91C_CAN_PROPAG          EQU (0x7:SHL:8) ;- (CAN) Programmation time segment
AT91C_CAN_SYNC            EQU (0x3:SHL:12) ;- (CAN) Re-synchronization jump width segment
AT91C_CAN_BRP             EQU (0x7F:SHL:16) ;- (CAN) Baudrate Prescaler
AT91C_CAN_SMP             EQU (0x1:SHL:24) ;- (CAN) Sampling mode
;- -------- CAN_TIM : (CAN Offset: 0x18) CAN Timer Register -------- 
AT91C_CAN_TIMER           EQU (0xFFFF:SHL:0) ;- (CAN) Timer field
;- -------- CAN_TIMESTP : (CAN Offset: 0x1c) CAN Timestamp Register -------- 
;- -------- CAN_ECR : (CAN Offset: 0x20) CAN Error Counter Register -------- 
AT91C_CAN_REC             EQU (0xFF:SHL:0) ;- (CAN) Receive Error Counter
AT91C_CAN_TEC             EQU (0xFF:SHL:16) ;- (CAN) Transmit Error Counter
;- -------- CAN_TCR : (CAN Offset: 0x24) CAN Transfer Command Register -------- 
AT91C_CAN_TIMRST          EQU (0x1:SHL:31) ;- (CAN) Timer Reset Field
;- -------- CAN_ACR : (CAN Offset: 0x28) CAN Abort Command Register -------- 

;- *****************************************************************************
;-              SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface
;- *****************************************************************************
                ^ 0 ;- AT91S_TC
TC_CCR          #  4 ;- Channel Control Register
TC_CMR          #  4 ;- Channel Mode Register (Capture Mode / Waveform Mode)
                #  8 ;- Reserved
TC_CV           #  4 ;- Counter Value
TC_RA           #  4 ;- Register A
TC_RB           #  4 ;- Register B
TC_RC           #  4 ;- Register C
TC_SR           #  4 ;- Status Register
TC_IER          #  4 ;- Interrupt Enable Register
TC_IDR          #  4 ;- Interrupt Disable Register
TC_IMR          #  4 ;- Interrupt Mask Register
;- -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- 
AT91C_TC_CLKEN            EQU (0x1:SHL:0) ;- (TC) Counter Clock Enable Command
AT91C_TC_CLKDIS           EQU (0x1:SHL:1) ;- (TC) Counter Clock Disable Command
AT91C_TC_SWTRG            EQU (0x1:SHL:2) ;- (TC) Software Trigger Command
;- -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- 
AT91C_TC_CLKS             EQU (0x7:SHL:0) ;- (TC) Clock Selection
AT91C_TC_CLKS_TIMER_DIV1_CLOCK EQU (0x0) ;- (TC) Clock selected: TIMER_DIV1_CLOCK
AT91C_TC_CLKS_TIMER_DIV2_CLOCK EQU (0x1) ;- (TC) Clock selected: TIMER_DIV2_CLOCK
AT91C_TC_CLKS_TIMER_DIV3_CLOCK EQU (0x2) ;- (TC) Clock selected: TIMER_DIV3_CLOCK
AT91C_TC_CLKS_TIMER_DIV4_CLOCK EQU (0x3) ;- (TC) Clock selected: TIMER_DIV4_CLOCK
AT91C_TC_CLKS_TIMER_DIV5_CLOCK EQU (0x4) ;- (TC) Clock selected: TIMER_DIV5_CLOCK
AT91C_TC_CLKS_XC0         EQU (0x5) ;- (TC) Clock selected: XC0
AT91C_TC_CLKS_XC1         EQU (0x6) ;- (TC) Clock selected: XC1
AT91C_TC_CLKS_XC2         EQU (0x7) ;- (TC) Clock selected: XC2
AT91C_TC_CLKI             EQU (0x1:SHL:3) ;- (TC) Clock Invert
AT91C_TC_BURST            EQU (0x3:SHL:4) ;- (TC) Burst Signal Selection
AT91C_TC_BURST_NONE       EQU (0x0:SHL:4) ;- (TC) The clock is not gated by an external signal
AT91C_TC_BURST_XC0        EQU (0x1:SHL:4) ;- (TC) XC0 is ANDed with the selected clock
AT91C_TC_BURST_XC1        EQU (0x2:SHL:4) ;- (TC) XC1 is ANDed with the selected clock
AT91C_TC_BURST_XC2        EQU (0x3:SHL:4) ;- (TC) XC2 is ANDed with the selected clock
AT91C_TC_CPCSTOP          EQU (0x1:SHL:6) ;- (TC) Counter Clock Stopped with RC Compare
AT91C_TC_LDBSTOP          EQU (0x1:SHL:6) ;- (TC) Counter Clock Stopped with RB Loading
AT91C_TC_CPCDIS           EQU (0x1:SHL:7) ;- (TC) Counter Clock Disable with RC Compare
AT91C_TC_LDBDIS           EQU (0x1:SHL:7) ;- (TC) Counter Clock Disabled with RB Loading
AT91C_TC_ETRGEDG          EQU (0x3:SHL:8) ;- (TC) External Trigger Edge Selection
AT91C_TC_ETRGEDG_NONE     EQU (0x0:SHL:8) ;- (TC) Edge: None
AT91C_TC_ETRGEDG_RISING   EQU (0x1:SHL:8) ;- (TC) Edge: rising edge
AT91C_TC_ETRGEDG_FALLING  EQU (0x2:SHL:8) ;- (TC) Edge: falling edge
AT91C_TC_ETRGEDG_BOTH     EQU (0x3:SHL:8) ;- (TC) Edge: each edge
AT91C_TC_EEVTEDG          EQU (0x3:SHL:8) ;- (TC) External Event Edge Selection
AT91C_TC_EEVTEDG_NONE     EQU (0x0:SHL:8) ;- (TC) Edge: None
AT91C_TC_EEVTEDG_RISING   EQU (0x1:SHL:8) ;- (TC) Edge: rising edge
AT91C_TC_EEVTEDG_FALLING  EQU (0x2:SHL:8) ;- (TC) Edge: falling edge
AT91C_TC_EEVTEDG_BOTH     EQU (0x3:SHL:8) ;- (TC) Edge: each edge
AT91C_TC_EEVT             EQU (0x3:SHL:10) ;- (TC) External Event  Selection
AT91C_TC_EEVT_TIOB        EQU (0x0:SHL:10) ;- (TC) Signal selected as external event: TIOB TIOB direction: input
AT91C_TC_EEVT_XC0         EQU (0x1:SHL:10) ;- (TC) Signal selected as external event: XC0 TIOB direction: output
AT91C_TC_EEVT_XC1         EQU (0x2:SHL:10) ;- (TC) Signal selected as external event: XC1 TIOB direction: output
AT91C_TC_EEVT_XC2         EQU (0x3:SHL:10) ;- (TC) Signal selected as external event: XC2 TIOB direction: output
AT91C_TC_ABETRG           EQU (0x1:SHL:10) ;- (TC) TIOA or TIOB External Trigger Selection
AT91C_TC_ENETRG           EQU (0x1:SHL:12) ;- (TC) External Event Trigger enable
AT91C_TC_WAVESEL          EQU (0x3:SHL:13) ;- (TC) Waveform  Selection
AT91C_TC_WAVESEL_UP       EQU (0x0:SHL:13) ;- (TC) UP mode without atomatic trigger on RC Compare
AT91C_TC_WAVESEL_UPDOWN   EQU (0x1:SHL:13) ;- (TC) UPDOWN mode without automatic trigger on RC Compare
AT91C_TC_WAVESEL_UP_AUTO  EQU (0x2:SHL:13) ;- (TC) UP mode with automatic trigger on RC Compare
AT91C_TC_WAVESEL_UPDOWN_AUTO EQU (0x3:SHL:13) ;- (TC) UPDOWN mode with automatic trigger on RC Compare
AT91C_TC_CPCTRG           EQU (0x1:SHL:14) ;- (TC) RC Compare Trigger Enable
AT91C_TC_WAVE             EQU (0x1:SHL:15) ;- (TC) 
AT91C_TC_ACPA             EQU (0x3:SHL:16) ;- (TC) RA Compare Effect on TIOA
AT91C_TC_ACPA_NONE        EQU (0x0:SHL:16) ;- (TC) Effect: none
AT91C_TC_ACPA_SET         EQU (0x1:SHL:16) ;- (TC) Effect: set
AT91C_TC_ACPA_CLEAR       EQU (0x2:SHL:16) ;- (TC) Effect: clear
AT91C_TC_ACPA_TOGGLE      EQU (0x3:SHL:16) ;- (TC) Effect: toggle
AT91C_TC_LDRA             EQU (0x3:SHL:16) ;- (TC) RA Loading Selection
AT91C_TC_LDRA_NONE        EQU (0x0:SHL:16) ;- (TC) Edge: None
AT91C_TC_LDRA_RISING      EQU (0x1:SHL:16) ;- (TC) Edge: rising edge of TIOA
AT91C_TC_LDRA_FALLING     EQU (0x2:SHL:16) ;- (TC) Edge: falling edge of TIOA
AT91C_TC_LDRA_BOTH        EQU (0x3:SHL:16) ;- (TC) Edge: each edge of TIOA
AT91C_TC_ACPC             EQU (0x3:SHL:18) ;- (TC) RC Compare Effect on TIOA
AT91C_TC_ACPC_NONE        EQU (0x0:SHL:18) ;- (TC) Effect: none
AT91C_TC_ACPC_SET         EQU (0x1:SHL:18) ;- (TC) Effect: set
AT91C_TC_ACPC_CLEAR       EQU (0x2:SHL:18) ;- (TC) Effect: clear
AT91C_TC_ACPC_TOGGLE      EQU (0x3:SHL:18) ;- (TC) Effect: toggle
AT91C_TC_LDRB             EQU (0x3:SHL:18) ;- (TC) RB Loading Selection
AT91C_TC_LDRB_NONE        EQU (0x0:SHL:18) ;- (TC) Edge: None
AT91C_TC_LDRB_RISING      EQU (0x1:SHL:18) ;- (TC) Edge: rising edge of TIOA
AT91C_TC_LDRB_FALLING     EQU (0x2:SHL:18) ;- (TC) Edge: falling edge of TIOA
AT91C_TC_LDRB_BOTH        EQU (0x3:SHL:18) ;- (TC) Edge: each edge of TIOA
AT91C_TC_AEEVT            EQU (0x3:SHL:20) ;- (TC) External Event Effect on TIOA
AT91C_TC_AEEVT_NONE       EQU (0x0:SHL:20) ;- (TC) Effect: none
AT91C_TC_AEEVT_SET        EQU (0x1:SHL:20) ;- (TC) Effect: set
AT91C_TC_AEEVT_CLEAR      EQU (0x2:SHL:20) ;- (TC) Effect: clear
AT91C_TC_AEEVT_TOGGLE     EQU (0x3:SHL:20) ;- (TC) Effect: toggle
AT91C_TC_ASWTRG           EQU (0x3:SHL:22) ;- (TC) Software Trigger Effect on TIOA
AT91C_TC_ASWTRG_NONE      EQU (0x0:SHL:22) ;- (TC) Effect: none
AT91C_TC_ASWTRG_SET       EQU (0x1:SHL:22) ;- (TC) Effect: set
AT91C_TC_ASWTRG_CLEAR     EQU (0x2:SHL:22) ;- (TC) Effect: clear
AT91C_TC_ASWTRG_TOGGLE    EQU (0x3:SHL:22) ;- (TC) Effect: toggle
AT91C_TC_BCPB             EQU (0x3:SHL:24) ;- (TC) RB Compare Effect on TIOB
AT91C_TC_BCPB_NONE        EQU (0x0:SHL:24) ;- (TC) Effect: none
AT91C_TC_BCPB_SET         EQU (0x1:SHL:24) ;- (TC) Effect: set
AT91C_TC_BCPB_CLEAR       EQU (0x2:SHL:24) ;- (TC) Effect: clear
AT91C_TC_BCPB_TOGGLE      EQU (0x3:SHL:24) ;- (TC) Effect: toggle
AT91C_TC_BCPC             EQU (0x3:SHL:26) ;- (TC) RC Compare Effect on TIOB
AT91C_TC_BCPC_NONE        EQU (0x0:SHL:26) ;- (TC) Effect: none
AT91C_TC_BCPC_SET         EQU (0x1:SHL:26) ;- (TC) Effect: set
AT91C_TC_BCPC_CLEAR       EQU (0x2:SHL:26) ;- (TC) Effect: clear
AT91C_TC_BCPC_TOGGLE      EQU (0x3:SHL:26) ;- (TC) Effect: toggle
AT91C_TC_BEEVT            EQU (0x3:SHL:28) ;- (TC) External Event Effect on TIOB
AT91C_TC_BEEVT_NONE       EQU (0x0:SHL:28) ;- (TC) Effect: none
AT91C_TC_BEEVT_SET        EQU (0x1:SHL:28) ;- (TC) Effect: set
AT91C_TC_BEEVT_CLEAR      EQU (0x2:SHL:28) ;- (TC) Effect: clear
AT91C_TC_BEEVT_TOGGLE     EQU (0x3:SHL:28) ;- (TC) Effect: toggle
AT91C_TC_BSWTRG           EQU (0x3:SHL:30) ;- (TC) Software Trigger Effect on TIOB
AT91C_TC_BSWTRG_NONE      EQU (0x0:SHL:30) ;- (TC) Effect: none
AT91C_TC_BSWTRG_SET       EQU (0x1:SHL:30) ;- (TC) Effect: set
AT91C_TC_BSWTRG_CLEAR     EQU (0x2:SHL:30) ;- (TC) Effect: clear
AT91C_TC_BSWTRG_TOGGLE    EQU (0x3:SHL:30) ;- (TC) Effect: toggle