intra_pred_pe.v

a H.264/AVC Baseline Decoder

				`Intra4x4_Diagonal_Down_Right:
				begin
					case (blk4x4_intra_calculate_counter)
						4:begin	PE0_in0 <= Intra_mbAddrB_window0;	PE0_in1 <= Intra_mbAddrA_window0;
								PE0_in2 <= Intra_mbAddrD_window;				end
						3:begin	PE0_in0 <= Intra_mbAddrD_window;	PE0_in1 <= Intra_mbAddrB_window1;
								PE0_in2 <= Intra_mbAddrB_window0;				end
						2:begin	PE0_in0 <= Intra_mbAddrB_window0;	PE0_in1 <= Intra_mbAddrB_window2;
								PE0_in2 <= Intra_mbAddrB_window1;				end
						1:begin	PE0_in0 <= Intra_mbAddrB_window1;	PE0_in1 <= Intra_mbAddrB_window3;
								PE0_in2 <= Intra_mbAddrB_window2;				end		
						default:begin	PE0_in0 <= 0;PE0_in1 <= 0;PE0_in2 <= 0;	end
					endcase
					PE0_in3 <= 0;
					PE0_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
					PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;	PE0_full_bypass <= 1'b0;
					PE0_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'b0:5'b00010; // +2
					PE0_shift_len	<= (blk4x4_intra_calculate_counter == 0)? 3'b0:3'b010;   // >>2
				end
				`Intra4x4_Vertical_Right:
				begin
					case (blk4x4_intra_calculate_counter)
						4:begin	PE0_in0 <= Intra_mbAddrB_window0;PE0_in1 <= Intra_mbAddrD_window; end
						3:begin	PE0_in0 <= Intra_mbAddrB_window0;PE0_in1 <= Intra_mbAddrB_window1;end
						2:begin	PE0_in0 <= Intra_mbAddrB_window2;PE0_in1 <= Intra_mbAddrB_window1;end
						1:begin	PE0_in0 <= Intra_mbAddrB_window2;PE0_in1 <= Intra_mbAddrB_window3;end
						default:begin	PE0_in0 <= 0;PE0_in1 <= 0;							      end
					endcase
					PE0_in2 <= 0;	PE0_in3 <= 0;
					PE0_IsShift <= 1'b0;PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;	PE0_full_bypass <= 1'b0;
					PE0_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'b0:5'b00001; // +1
					PE0_shift_len	<= (blk4x4_intra_calculate_counter == 0)? 3'b0:3'b001;   // >>1
				end
				`Intra4x4_Horizontal_Down:
				begin
					case (blk4x4_intra_calculate_counter)
						4:begin	PE0_in0 <= Intra_mbAddrA_window0;PE0_in1 <= Intra_mbAddrD_window;
								PE0_in2 <= 0;
								PE0_round_value <= 5'b00001;	PE0_shift_len <= 3'b001;end
						3:begin	PE0_in0 <= Intra_mbAddrA_window0;PE0_in1 <= Intra_mbAddrB_window0;
								PE0_in2 <= Intra_mbAddrD_window;				
								PE0_round_value <= 5'b00010;	PE0_shift_len <= 3'b010;end
						2:begin	PE0_in0 <= Intra_mbAddrD_window;	 PE0_in1 <= Intra_mbAddrB_window1;
								PE0_in2 <= Intra_mbAddrB_window0;
								PE0_round_value <= 5'b00010;	PE0_shift_len <= 3'b010;end
						1:begin	PE0_in0 <= Intra_mbAddrB_window0;PE0_in1 <= Intra_mbAddrB_window2;
								PE0_in2 <= Intra_mbAddrB_window1;				
								PE0_round_value <= 5'b00010;	PE0_shift_len <= 3'b010;end
						default:begin	PE0_in0 <= 0;PE0_in1 <= 0;PE0_in2 <= 0;	
										PE0_round_value <= 0;PE0_shift_len <= 0;	end
					endcase
					PE0_in3 <= 0;
					PE0_IsShift <= (blk4x4_intra_calculate_counter == 3 || blk4x4_intra_calculate_counter == 2
					|| blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
					PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;	PE0_full_bypass <= 1'b0;
				end
				`Intra4x4_Vertical_Left:
				begin
					case (blk4x4_intra_calculate_counter)
						4:PE0_in0 <= Intra_mbAddrB_window0;
						3:PE0_in0 <= blk4x4_pred_output8;
						2:PE0_in0 <= blk4x4_pred_output9;
						1:PE0_in0 <= blk4x4_pred_output10;
						default:PE0_in0 <= 0;
					endcase
					PE0_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window1:0;
					PE0_in2 <= 0;	PE0_in3 <= 0;
					PE0_IsShift <= 1'b0; PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;
					PE0_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
					PE0_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'b00001:5'b0; // +1
					PE0_shift_len	<= (blk4x4_intra_calculate_counter == 4)? 3'b001:3'b0;   // >>1
				end
				`Intra4x4_Horizontal_Up:
				begin
					case (blk4x4_intra_calculate_counter)
						4:begin	PE0_in0 <= Intra_mbAddrA_window0;	PE0_in1 <= Intra_mbAddrA_window1;	end
						3:begin	PE0_in0 <= Intra_mbAddrA_window0;	PE0_in1 <= Intra_mbAddrA_window2;	end
						2:begin	PE0_in0 <= blk4x4_pred_output4;	PE0_in1 <= 0;				 	end
						1:begin	PE0_in0 <= blk4x4_pred_output5;	PE0_in1 <= 0;					end
						default:begin	PE0_in0 <= 0;	PE0_in1 <= 0;									end
					endcase
					PE0_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window1:0;
					PE0_in3 <= 0;
					PE0_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
					PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;
					PE0_full_bypass <= (blk4x4_intra_calculate_counter == 4 || 
										blk4x4_intra_calculate_counter == 3)? 1'b0:1'b1;
					PE0_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
								       (blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
				 	PE0_shift_len	<= (blk4x4_intra_calculate_counter == 4)? 3'd1:
								       (blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
				end
				default:
				begin
					PE0_in0 <= 0;	PE0_in1 <= 0;	PE0_in2 <= 0;	PE0_in3 <= 0;
					PE0_IsShift 	<= 0;	PE0_IsStore 	<= 0;	PE0_IsClip 	  <= 0;
					PE0_full_bypass <= 0;	PE0_round_value <= 0;	PE0_shift_len <= 0;	
				end
			endcase
		//Intra16x16
		else if (mb_type_general[3:2] == 2'b10 && blk4x4_rec_counter < 16)
			case (Intra16x16_predmode)
				`Intra16x16_Vertical:
				begin
					case (blk4x4_intra_calculate_counter)
						4:PE0_in0 <= Intra_mbAddrB_window0;
						3:PE0_in0 <= Intra_mbAddrB_window1;
						2:PE0_in0 <= Intra_mbAddrB_window2;
						1:PE0_in0 <= Intra_mbAddrB_window3;
						default:PE0_in0 <= 0;
					endcase
					PE0_in1 		<= 0; 	PE0_in2 		<= 0;	PE0_in3       <= 0; 		
					PE0_IsShift 	<= 0;	PE0_IsStore 	<= 0;	PE0_IsClip 	  <= 0;
					PE0_full_bypass <= 1;	PE0_round_value <= 0;	PE0_shift_len <= 0;
				end
				`Intra16x16_Horizontal:
				begin
					PE0_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window0:0;
					PE0_in1 		<= 0; 	PE0_in2 		<= 0;	PE0_in3 	  <= 0; 		
					PE0_IsShift 	<= 0;	PE0_IsStore 	<= 0;	PE0_IsClip    <= 0;
					PE0_full_bypass <= 1;	PE0_round_value <= 0;	PE0_shift_len <= 0;
				end
				`Intra16x16_DC:
				if (blk4x4_rec_counter == 0)
					case (blk4x4_intra_calculate_counter)
						4:begin		//	A2 + B2 + C2 + D2
							PE0_in0 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg0;
							PE0_in1 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg1;
							PE0_in2 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg2;
							PE0_in3 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg3;
							PE0_IsShift 	<= 0;	PE0_IsStore 	<= 1;	PE0_IsClip    <= 0;
							PE0_full_bypass <= 0;	PE0_round_value <= 0;	PE0_shift_len <= 0;	end
						3:begin		//	PE0 output + B1 + C1 + D1
							PE0_in0 <= PE0_out_reg;
							PE0_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg1;
							PE0_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg2;
							PE0_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg3;
							PE0_IsShift 	<= 0;	PE0_IsStore 	<= 1;	PE0_IsClip 	  <= 0;
							PE0_full_bypass <= 0;	PE0_round_value <= 0;	PE0_shift_len <= 0;	end
						2:begin		//	PE0 output + PE1 output + PE2 output + PE3 output
							PE0_in0 <= PE0_out_reg;	PE0_in1 <= PE1_out_reg;
							PE0_in2 <= PE2_out_reg;	PE0_in3 <= PE3_out_reg;
							PE0_IsShift 	<= 0;	PE0_IsStore 	<= 1;	PE0_IsClip 	  <= 0;
							PE0_full_bypass <= 0;	PE0_round_value <= 0;	PE0_shift_len <= 0;	end
						1:begin		//	final DC output
							PE0_in0 <= (!mbAddrA_availability && !mbAddrB_availability)? 16'd128:PE0_out_reg;
							PE0_in1 <= PE1_out_reg;		PE0_in2 	<= 0;	PE0_in3    <= 0;
							PE0_IsShift <= 0;			PE0_IsStore <= 1;	PE0_IsClip <= 0;
							PE0_full_bypass <= (!mbAddrA_availability && !mbAddrB_availability)? 1'b1    :1'b0;
							PE0_round_value <= ( mbAddrA_availability &&  mbAddrB_availability)? 5'b10000:5'b01000;		
							PE0_shift_len 	<= ( mbAddrA_availability &&  mbAddrB_availability)? 3'b101  :3'b100;
						  end
						default:begin
							PE0_in0 <= 0;	PE0_in1 <= 0;	PE0_in2 <= 0;	PE0_in3 <= 0;
							PE0_IsShift 	<= 0;	PE0_IsStore 	<= 0;	PE0_IsClip 	  <= 0;
							PE0_full_bypass <= 0;	PE0_round_value <= 0;	PE0_shift_len <= 0;	end
					endcase
				else
					begin
						PE0_in0 <= 0;	PE0_in1 <= 0;	PE0_in2 <= 0;	PE0_in3 <= 0;
						PE0_IsShift 	<= 0;	PE0_IsStore 	<= 0;	PE0_IsClip 	  <= 0;
						PE0_full_bypass <= 0;	PE0_round_value <= 0;	PE0_shift_len <= 0;
					end
				`Intra16x16_Plane:
				begin
					if (blk4x4_intra_calculate_counter != 0)
						//blk0,2,4,6,8,10,12,14,calc counter == 3'b100:PE0_in0 <= seed;
						//other cases								  :PE0_in0 <= left pixel output
						PE0_in0 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[0] == 1'b0)? 
									seed:PE0_out_reg;
					else
						PE0_in0 <= 0;
					//blk0,2,8,10,calc counter == 3'b100:PE0_in1 <= c_ext
					//other cases                       :PE0_in1 <= b_ext
					if (blk4x4_intra_calculate_counter != 0)
						PE0_in1 <= (blk4x4_intra_calculate_counter == 4 && !blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
									c_ext:b_ext;
					else
						PE0_in1 <= 0;
					PE0_in2			<= 0;		PE0_in3	<= 0;
					PE0_IsShift 	<= 1'b0;
					PE0_IsStore		<= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
					PE0_IsClip 		<= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
					PE0_full_bypass	<= 1'b0;
					PE0_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
					PE0_shift_len	<= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
				end
			endcase
		//Chroma
		else if (mb_type_general[3] == 1'b1 && blk4x4_rec_counter > 15)
			case (Intra_chroma_predmode)
				`Intra_chroma_DC:
				begin
					case ({mbAddrA_availability,mbAddrB_availability})
						2'b00:PE0_in0 <= (blk4x4_intra_calculate_counter == 3)? 15'd128:15'd0;
						2'b01:PE0_in0 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window0:
										 (blk4x4_intra_calculate_counter == 3)? PE0_out_reg:0;
						2'b10:PE0_in0 <= (blk4x4_intra_calculate_counter == 3)? PE1_out_reg:0;
						2'b11:
						if (blk4x4_intra_calculate_counter == 4)
							PE0_in0 <= (blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22)? 
										0:Intra_mbAddrB_window0;
						else if (blk4x4_intra_calculate_counter == 3)
							PE0_in0 <= PE0_out_reg;
						else
							PE0_in0 <= 0;
					endcase
					case ({mbAddrA_availability,mbAddrB_availability})
						2'b00:PE0_in1 <= 0;
						2'b01:PE0_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window1:0;
						2'b10:PE0_in1 <= 0;
						2'b11:
						if (blk4x4_intra_calculate_counter == 4)
							PE0_in1 <= (blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22)? 
										0:Intra_mbAddrB_window1;
						else if (blk4x4_intra_calculate_counter == 3)
							PE0_in1 <= PE1_out_reg;
						else
							PE0_in1 <= 0;
					endcase
					case (mbAddrB_availability)
						1'b0:begin PE0_in2 <= 0; PE0_in3 <= 0; end
						1'b1:
						begin
							if (blk4x4_intra_calculate_counter == 4)
								begin
									PE0_in2 <= ((blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22) && mbAddrA_availability)?
												0:Intra_mbAddrB_window2;
									PE0_in3 <= ((blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22) && mbAddrA_availability)?
												0:Intra_mbAddrB_window3;
								end
							else
								begin PE0_in2 <= 0; PE0_in3 <= 0; end
						end
					endcase
					PE0_IsShift <= 1'b0;
					PE0_IsStore <= (mbAddrB_availability && blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0; 
					PE0_IsClip  <= 1'b0;
					PE0_full_bypass <= (!mbAddrA_availability && !mbAddrB_availability && 
										blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
					case ({mbAddrA_availability,mbAddrB_availability})
						2'b00		:begin PE0_round_value <= 0; PE0_shift_len <= 0; end
						2'b01,2'b10	:begin PE0_round_value <= (blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
										   PE0_shift_len   <= (blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0; end	
						2'b11:
						begin
							if (blk4x4_intra_calculate_counter == 3)
								begin 
									PE0_round_value <= (blk4x4_rec_counter == 16 || blk4x4_rec_counter == 19 || 
									blk4x4_rec_counter == 20 || blk4x4_rec_counter == 23)? 5'd4:5'd2;
									PE0_shift_len   <= (blk4x4_rec_counter == 16 || blk4x4_rec_counter == 19 || 
									blk4x4_rec_counter == 20 || blk4x4_rec_counter == 23)? 3'd3:3'd2;
								end
							else
								begin PE0_round_value <= 0; PE0_shift_len <= 0; end
						end		
					endcase
				end
				`Intra_chroma_Horizontal:	//---horizontal---
				begin
					PE0_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window0:0;
					PE0_in1 		<= 0; 	PE0_in2 		<= 0;	PE0_in3 	  <= 0; 		
					PE0_IsShift 	<= 0;	PE0_IsStore 	<= 0;	PE0_IsClip    <= 0;
					PE0_full_bypass <= 1;	PE0_round_value <= 0;	PE0_shift_len <= 0;
				end
				`Intra_chroma_Vertical:		//---vertical---
				begin
					case (blk4x4_intra_calculate_counter)
						4:PE0_in0 <= Intra_mbAddrB_window0;
						3:PE0_in0 <= Intra_mbAddrB_window1;
						2:PE0_in0 <= Intra_mbAddrB_window2;
						1:PE0_in0 <= Intra_mbAddrB_window3;
						default:PE0_in0 <= 0;
					endcase
					PE0_in1 		<= 0; 	PE0_in2 		<= 0;	PE0_in3       <= 0; 		
					PE0_IsShift 	<= 0;	PE0_IsStore 	<= 0;	PE0_IsClip 	  <= 0;
					PE0_full_bypass <= 1;	PE0_round_value <= 0;	PE0_shift_len <= 0;
				end
				`Intra_chroma_Plane:			//---plane---
				begin
					if (blk4x4_intra_calculate_counter != 0)
						//need seed,	   blk4x4 = 16 | 18 | 20 | 22
						//do not need seed,blk4x4 = 17 | 19 | 21 | 23
						PE0_in0 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)? 
									seed:PE0_out_reg;
					else
						PE0_in0 <= 0;
					if (blk4x4_intra_calculate_counter != 0)
						PE0_in1 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)? c_ext:b_ext;
					else
						PE0_in1 <= 0;
					PE0_in2			<= 0;		PE0_in3	<= 0;
					PE0_IsShift 	<= 1'b0;
					PE0_IsStore		<= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
					PE0_IsClip 		<= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
					PE0_full_bypass	<= 1'b0;
					PE0_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
					PE0_shift_len	<= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;