inter_pred_lpe.v

a H.264/AVC Baseline Decoder

		.B(bilinear2_B),
		.bilinear_out(bilinear2_out)
		);
	bilinear bilinear3 (
		.A(bilinear3_A),
		.B(bilinear3_B),
		.bilinear_out(bilinear3_out)
		);
	always @ (IsInterLuma or pos_FracL or blk4x4_inter_calculate_counter
		or Inter_bi_window_0 or Inter_bi_window_1 or Inter_bi_window_2 or Inter_bi_window_3
		or H_6tapfilter2_round_out or H_6tapfilter3_round_out or H_6tapfilter4_round_out or H_6tapfilter5_round_out
		or V_6tapfilter0_round_out or V_6tapfilter1_round_out or V_6tapfilter2_round_out or V_6tapfilter3_round_out
		or b0_reg or b1_reg or b2_reg or b3_reg or h0_reg or h1_reg or h2_reg or h3_reg)
		if (IsInterLuma)
			case ({pos_FracL})
				`pos_a,`pos_c:
				if (blk4x4_inter_calculate_counter != 4'd0)
					begin 
						bilinear0_A <= Inter_bi_window_0; bilinear0_B <= H_6tapfilter2_round_out;
						bilinear1_A <= Inter_bi_window_1; bilinear1_B <= H_6tapfilter3_round_out;
						bilinear2_A <= Inter_bi_window_2; bilinear2_B <= H_6tapfilter4_round_out;
						bilinear3_A <= Inter_bi_window_3; bilinear3_B <= H_6tapfilter5_round_out;
					end
				else 
					begin 
						bilinear0_A <= 0; bilinear0_B <= 0; bilinear1_A <= 0; bilinear1_B <= 0;
						bilinear2_A <= 0; bilinear2_B <= 0; bilinear3_A <= 0; bilinear3_B <= 0;
					end
				`pos_d,`pos_n:
				if (blk4x4_inter_calculate_counter != 4'd0)
					begin 
						bilinear0_A <= Inter_bi_window_0; bilinear0_B <= V_6tapfilter0_round_out;
						bilinear1_A <= Inter_bi_window_1; bilinear1_B <= V_6tapfilter1_round_out;
						bilinear2_A <= Inter_bi_window_2; bilinear2_B <= V_6tapfilter2_round_out;
						bilinear3_A <= Inter_bi_window_3; bilinear3_B <= V_6tapfilter3_round_out;
					end
				else 
					begin 
						bilinear0_A <= 0; bilinear0_B <= 0; bilinear1_A <= 0; bilinear1_B <= 0;
						bilinear2_A <= 0; bilinear2_B <= 0; bilinear3_A <= 0; bilinear3_B <= 0;
					end
				`pos_e,`pos_g,`pos_p,`pos_r:
				if (blk4x4_inter_calculate_counter != 4'd0)
					begin 
						bilinear0_A <= H_6tapfilter2_round_out;	bilinear0_B <= V_6tapfilter0_round_out;
						bilinear1_A <= H_6tapfilter3_round_out;	bilinear1_B <= V_6tapfilter1_round_out;
						bilinear2_A <= H_6tapfilter4_round_out;	bilinear2_B <= V_6tapfilter2_round_out;
						bilinear3_A <= H_6tapfilter5_round_out;	bilinear3_B <= V_6tapfilter3_round_out;
					end
				else
					begin 
						bilinear0_A <= 0; bilinear0_B <= 0; bilinear1_A <= 0; bilinear1_B <= 0;
						bilinear2_A <= 0; bilinear2_B <= 0; bilinear3_A <= 0; bilinear3_B <= 0;
					end
				`pos_i,`pos_k:
				if (blk4x4_inter_calculate_counter == 4'd7 || blk4x4_inter_calculate_counter == 4'd5 ||
					blk4x4_inter_calculate_counter == 4'd3 || blk4x4_inter_calculate_counter == 4'd1)
					begin 
						bilinear0_A <= h0_reg; 	bilinear0_B <= V_6tapfilter0_round_out;
						bilinear1_A <= h1_reg; 	bilinear1_B <= V_6tapfilter1_round_out;
						bilinear2_A <= h2_reg; 	bilinear2_B <= V_6tapfilter2_round_out;
						bilinear3_A <= h3_reg; 	bilinear3_B <= V_6tapfilter3_round_out;
					end
				else 
					begin 
						bilinear0_A <= 0; bilinear0_B <= 0; bilinear1_A <= 0; bilinear1_B <= 0;
						bilinear2_A <= 0; bilinear2_B <= 0; bilinear3_A <= 0; bilinear3_B <= 0;
					end
				`pos_f,`pos_q:
				if (blk4x4_inter_calculate_counter != 4'd5 && blk4x4_inter_calculate_counter != 4'd0)
					begin 
						bilinear0_A <= b0_reg;	bilinear0_B <= V_6tapfilter0_round_out;
						bilinear1_A <= b1_reg;	bilinear1_B <= V_6tapfilter1_round_out;
						bilinear2_A <= b2_reg;	bilinear2_B <= V_6tapfilter2_round_out;
						bilinear3_A <= b3_reg;	bilinear3_B <= V_6tapfilter3_round_out;
					end
				else
					begin 
						bilinear0_A <= 0; bilinear0_B <= 0; bilinear1_A <= 0; bilinear1_B <= 0;
						bilinear2_A <= 0; bilinear2_B <= 0; bilinear3_A <= 0; bilinear3_B <= 0;
					end
				default:
					begin 
						bilinear0_A <= 0; bilinear0_B <= 0; bilinear1_A <= 0; bilinear1_B <= 0;
						bilinear2_A <= 0; bilinear2_B <= 0; bilinear3_A <= 0; bilinear3_B <= 0;
					end
			endcase
		else
			begin 
				bilinear0_A <= 0; bilinear0_B <= 0; bilinear1_A <= 0; bilinear1_B <= 0;
				bilinear2_A <= 0; bilinear2_B <= 0; bilinear3_A <= 0; bilinear3_B <= 0;
			end
			
	//------------------------------------------------------------------------------------------		
	//only "b","h" and "j" of half-pel positions need to be stored to predict quater-pel samples
	//------------------------------------------------------------------------------------------
	
	//b0_raw_reg0 ~ b8_raw_reg:update after j/f/q/i/k horizontal filtering
	wire b_raw_reg_ena;
	assign b_raw_reg_ena = (IsInterLuma && 
	((pos_FracL == `pos_j && blk4x4_inter_calculate_counter != 4'd1 && blk4x4_inter_calculate_counter != 4'd0) ||
	((pos_FracL == `pos_f || pos_FracL == `pos_q) && (blk4x4_inter_calculate_counter == 4'd5 || 
												    blk4x4_inter_calculate_counter == 4'd4 ||
												    blk4x4_inter_calculate_counter == 4'd3 ||
												    blk4x4_inter_calculate_counter == 4'd2))	||
	((pos_FracL == `pos_i || pos_FracL == `pos_k) && (blk4x4_inter_calculate_counter == 4'd8 || 
													blk4x4_inter_calculate_counter == 4'd6 ||
													blk4x4_inter_calculate_counter == 4'd4 ||
													blk4x4_inter_calculate_counter == 4'd2))));
	
	always @ (posedge clk)
		if (reset_n == 1'b0)
			begin
				b0_raw_reg <= 0; b1_raw_reg <= 0; b2_raw_reg <= 0; b3_raw_reg <= 0; b4_raw_reg <= 0;
				b5_raw_reg <= 0; b6_raw_reg <= 0; b7_raw_reg <= 0; b8_raw_reg <= 0; 
			end
		else if (b_raw_reg_ena)
			begin
				b0_raw_reg <= H_6tapfilter0_raw_out;b1_raw_reg <= H_6tapfilter1_raw_out;b2_raw_reg <= H_6tapfilter2_raw_out;
				b3_raw_reg <= H_6tapfilter3_raw_out;b4_raw_reg <= H_6tapfilter4_raw_out;b5_raw_reg <= H_6tapfilter5_raw_out;
				b6_raw_reg <= H_6tapfilter6_raw_out;b7_raw_reg <= H_6tapfilter7_raw_out;b8_raw_reg <= H_6tapfilter8_raw_out;
			end
			
	//b0_reg ~ b3_reg:update for decoding f,q
	//Note:position q needs "b" of next line
	wire b_reg_ena;
	assign b_reg_ena = (IsInterLuma && ((pos_FracL == `pos_f || pos_FracL == `pos_q) && (blk4x4_inter_calculate_counter == 4'd5 ||
	blk4x4_inter_calculate_counter == 4'd4 || blk4x4_inter_calculate_counter == 4'd3 || blk4x4_inter_calculate_counter == 4'd2)));
	
	always @ (posedge clk)
		if (reset_n == 1'b0)
			begin
				b0_reg <= 0; b1_reg <= 0; b2_reg <= 0; b3_reg <= 0;
			end
		else if (b_reg_ena)	
			begin
				if (pos_FracL == `pos_q)
					begin
						b0_reg <= H_6tapfilter3_round_out; b1_reg <= H_6tapfilter4_round_out;
						b2_reg <= H_6tapfilter5_round_out; b3_reg <= H_6tapfilter6_round_out;
					end
				else	
					begin
						b0_reg <= H_6tapfilter2_round_out; b1_reg <= H_6tapfilter3_round_out;
						b2_reg <= H_6tapfilter4_round_out; b3_reg <= H_6tapfilter5_round_out;
					end
			end
			
	//h0_reg ~ h3_reg:update for decoding i,k
	wire h_reg_ena;
	assign h_reg_ena = (IsInterLuma && ((pos_FracL == `pos_i || pos_FracL == `pos_k) && (blk4x4_inter_calculate_counter == 4'd8 ||
	blk4x4_inter_calculate_counter == 4'd6 || blk4x4_inter_calculate_counter == 4'd4 || blk4x4_inter_calculate_counter == 4'd2)));
	
	always @ (posedge clk)
		if (reset_n == 1'b0)
			begin
				h0_reg <= 0; h1_reg <= 0; h2_reg <= 0; h3_reg <= 0;
			end
		else if (h_reg_ena)
			begin
				h0_reg <= V_6tapfilter0_round_out; h1_reg <= V_6tapfilter1_round_out;
				h2_reg <= V_6tapfilter2_round_out; h3_reg <= V_6tapfilter3_round_out;
			end
	//------------------------------------------------------------------------------------------		
	//LPE output
	//------------------------------------------------------------------------------------------
	always @ (IsInterLuma or pos_FracL or blk4x4_inter_calculate_counter  
		or V_6tapfilter0_round_out or V_6tapfilter1_round_out or V_6tapfilter2_round_out or V_6tapfilter3_round_out
		or H_6tapfilter2_round_out or H_6tapfilter3_round_out or H_6tapfilter4_round_out or H_6tapfilter5_round_out
		or bilinear0_out or bilinear1_out or bilinear2_out or bilinear3_out)
		if (IsInterLuma)
			case (pos_FracL)
				//pos_Int: directly bypassed by Inter_pix_copy0 ~ Inter_pix_copy3
				`pos_b:
				if (blk4x4_inter_calculate_counter != 0)
					begin
						LPE0_out <= H_6tapfilter2_round_out; LPE1_out <= H_6tapfilter3_round_out;
						LPE2_out <= H_6tapfilter4_round_out; LPE3_out <= H_6tapfilter5_round_out;	
					end
				else
					begin LPE0_out <= 0; LPE1_out <= 0;LPE2_out <= 0; LPE3_out <= 0;end
				`pos_h:
				if (blk4x4_inter_calculate_counter != 0)
					begin
						LPE0_out <= V_6tapfilter0_round_out; LPE1_out <= V_6tapfilter1_round_out;
						LPE2_out <= V_6tapfilter2_round_out; LPE3_out <= V_6tapfilter3_round_out;	
					end
				else
					begin LPE0_out <= 0; LPE1_out <= 0;LPE2_out <= 0; LPE3_out <= 0;end
				`pos_j:
				if (blk4x4_inter_calculate_counter != 4'd5 && blk4x4_inter_calculate_counter != 0)
					begin
						LPE0_out <= V_6tapfilter0_round_out; LPE1_out <= V_6tapfilter1_round_out;
						LPE2_out <= V_6tapfilter2_round_out; LPE3_out <= V_6tapfilter3_round_out;	
					end
				else
					begin LPE0_out <= 0; LPE1_out <= 0;LPE2_out <= 0; LPE3_out <= 0;end	
				`pos_a,`pos_c,`pos_d,`pos_e,`pos_g,`pos_n,`pos_p,`pos_r,`pos_f,`pos_q:
				if (blk4x4_inter_calculate_counter == 4'd4 || blk4x4_inter_calculate_counter == 4'd3 ||
					blk4x4_inter_calculate_counter == 4'd2 || blk4x4_inter_calculate_counter == 4'd1)
					begin
						LPE0_out <= bilinear0_out; LPE1_out <= bilinear1_out;
						LPE2_out <= bilinear2_out; LPE3_out <= bilinear3_out;	
					end
				else
					begin LPE0_out <= 0; LPE1_out <= 0;LPE2_out <= 0; LPE3_out <= 0;end
				`pos_i,`pos_k:
				if (blk4x4_inter_calculate_counter == 4'd7 || blk4x4_inter_calculate_counter == 4'd5 ||
					blk4x4_inter_calculate_counter == 4'd3 || blk4x4_inter_calculate_counter == 4'd1)
					begin
						LPE0_out <= bilinear0_out; LPE1_out <= bilinear1_out;
						LPE2_out <= bilinear2_out; LPE3_out <= bilinear3_out;	
					end
				else
					begin LPE0_out <= 0; LPE1_out <= 0;LPE2_out <= 0; LPE3_out <= 0;end
				default:
					begin LPE0_out <= 0; LPE1_out <= 0;LPE2_out <= 0; LPE3_out <= 0;end
			endcase
		else 
			begin LPE0_out <= 0; LPE1_out <= 0;LPE2_out <= 0; LPE3_out <= 0;end
			
endmodule

module filterH_6tap(A,B,C,D,E,F,H_need_round,raw_out,round_out);
	input [7:0] A,B,C,D,E,F;
	input H_need_round;
	output [14:0] raw_out; 	//always output
	output [7:0]  round_out;
	
	wire [8:0] sum_AF;
	wire [8:0] sum_BE;
	wire [8:0] sum_CD;
	wire [10:0] sum_4CD;
	wire [11:0] sum_1;
	wire [12:0] sum_2;
	wire [13:0] sum_3;
	wire [14:0] sum_round;
	wire [9:0] round_tmp;
	
	assign sum_AF = A + F;
	assign sum_BE = B + E;
	assign sum_CD = C + D;
	assign sum_4CD = {sum_CD,2'b0};
	assign sum_1 = {1'b0,sum_4CD} + {3'b111,~sum_BE} + 1;
	assign sum_2 = {4'b0,sum_AF} + {sum_1[11],sum_1};
	assign sum_3 = {sum_1,2'b0};
	assign raw_out = {{2{sum_2[12]}},sum_2} + {sum_3[13],sum_3};
	//round
	assign sum_round = (H_need_round)? (raw_out + 16):0;
	assign round_tmp = (H_need_round)? sum_round[14:5]:0;
	assign round_out = (round_tmp[9])? 8'd0:((round_tmp[8])? 8'd255:round_tmp[7:0]);
endmodule

module filterV_6tap(A,B,C,D,E,F,Is_jfqik,round_out);
	input [14:0] A,B,C,D,E,F;
	input Is_jfqik;
	output [7:0] round_out;
	
	wire [15:0] sum_AF;
	wire [15:0] sum_BE;
	wire [15:0] sum_CD;
	wire [17:0] sum_4CD;
	wire [17:0] sum_1;
	wire [17:0] sum_2;
	wire [19:0] sum_3;
	wire [19:0] raw_out;
	
	wire [19:0] sum_round;
	wire [9:0] round_tmp;
	
	assign sum_AF = {A[14],A} + {F[14],F};
	assign sum_BE = {B[14],B} + {E[14],E};
	assign sum_CD = {C[14],C} + {D[14],D};
	assign sum_4CD = {sum_CD,2'b0};
	assign sum_1 = sum_4CD + {~sum_BE[15],~sum_BE[15],~sum_BE} + 1;
	assign sum_2 = {{2{sum_AF[15]}},sum_AF} + sum_1;
	assign sum_3 = {sum_1,2'b0};
	assign raw_out = {{2{sum_2[17]}},sum_2} + sum_3;
	//round
	assign sum_round = (Is_jfqik)? (raw_out + 512):(raw_out + 16);
	assign round_tmp = (Is_jfqik)? sum_round[19:10]:sum_round[14:5];
	assign round_out = (round_tmp[9])? 8'd0:((round_tmp[8])? 8'd255:round_tmp[7:0]);
endmodule

module bilinear (A,B,bilinear_out);
	input [7:0] A,B;
	output [7:0] bilinear_out;
	wire [8:0] sum_AB;
	
	assign sum_AB = A + B + 1; //here A and B should NOT extend as {A[7],A}
	assign bilinear_out = sum_AB[8:1];
endmodule