📄 inter_pred_pipeline.v
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//--------------------------------------------------------------------------------------------------// Design : nova// Author(s) : Ke Xu// Email : eexuke@yahoo.com// File : Inter_pred_pipeline.v// Generated : Oct 4, 2005// Copyright (C) 2008 Ke Xu //-------------------------------------------------------------------------------------------------// Description // Inter prediction pipeline//-------------------------------------------------------------------------------------------------// Revise log // 1.July 23,2006// Change the ext_frame_RAM from async read to sync read.Therefore,blk4x4_inter_preload_counter has to +1 for all the cases//-------------------------------------------------------------------------------------------------// synopsys translate_off`include "timescale.v"// synopsys translate_on`include "nova_defines.v"module Inter_pred_pipeline (clk,reset_n, mb_num_h,mb_num_v,trigger_blk4x4_inter_pred,blk4x4_rec_counter,mb_type_general_bit3, mv_is16x16,mv_below8x8, mvx_CurrMb0,mvx_CurrMb1,mvx_CurrMb2,mvx_CurrMb3, mvy_CurrMb0,mvy_CurrMb1,mvy_CurrMb2,mvy_CurrMb3, Inter_pix_copy0,Inter_pix_copy1,Inter_pix_copy2,Inter_pix_copy3, LPE0_out,LPE1_out,LPE2_out,LPE3_out, CPE0_out,CPE1_out,CPE2_out,CPE3_out, mv_below8x8_curr,blk4x4_inter_preload_counter,blk4x4_inter_calculate_counter,Inter_chroma2x2_counter, end_of_one_blk4x4_inter,IsInterLuma,IsInterChroma,Is_InterChromaCopy, xInt_addr_unclip,xInt_org_unclip_1to0,pos_FracL,xFracC,yFracC, Inter_pred_out0,Inter_pred_out1,Inter_pred_out2,Inter_pred_out3,Inter_blk4x4_pred_output_valid, ref_frame_RAM_rd,ref_frame_RAM_rd_addr); input clk; input reset_n; input [3:0] mb_num_h,mb_num_v; input trigger_blk4x4_inter_pred; input [4:0] blk4x4_rec_counter; input mb_type_general_bit3; input mv_is16x16; input [3:0] mv_below8x8; input [31:0] mvx_CurrMb0,mvx_CurrMb1,mvx_CurrMb2,mvx_CurrMb3; input [31:0] mvy_CurrMb0,mvy_CurrMb1,mvy_CurrMb2,mvy_CurrMb3; input [7:0] Inter_pix_copy0,Inter_pix_copy1,Inter_pix_copy2,Inter_pix_copy3; input [7:0] LPE0_out,LPE1_out,LPE2_out,LPE3_out; input [7:0] CPE0_out,CPE1_out,CPE2_out,CPE3_out; output mv_below8x8_curr; output [5:0] blk4x4_inter_preload_counter; output [3:0] blk4x4_inter_calculate_counter; output [1:0] Inter_chroma2x2_counter; output end_of_one_blk4x4_inter; output IsInterLuma,IsInterChroma; output Is_InterChromaCopy; output [8:0] xInt_addr_unclip; output [1:0] xInt_org_unclip_1to0; output [3:0] pos_FracL; output [2:0] xFracC,yFracC; output [7:0] Inter_pred_out0,Inter_pred_out1,Inter_pred_out2,Inter_pred_out3; output [1:0] Inter_blk4x4_pred_output_valid; //2'b01:luma output valid 2'b10:chroma output valid output ref_frame_RAM_rd; output [13:0] ref_frame_RAM_rd_addr; reg [5:0] blk4x4_inter_preload_counter; reg [3:0] blk4x4_inter_calculate_counter; reg mv_below8x8_curr; reg [7:0] Inter_pred_out0,Inter_pred_out1,Inter_pred_out2,Inter_pred_out3; reg [1:0] Inter_blk4x4_pred_output_valid; wire ref_frame_RAM_rd; wire IsInterLuma; wire IsInterChroma; wire [1:0] xFracL; wire [1:0] yFracL; wire [2:0] xFracC; wire [2:0] yFracC; wire [13:0] ref_frame_RAM_rd_addr; assign IsInterLuma = (!mb_type_general_bit3 && blk4x4_rec_counter < 16)? 1'b1:1'b0; assign IsInterChroma = (!mb_type_general_bit3 && blk4x4_rec_counter > 15)? 1'b1:1'b0; //------------------------------------------------------------------------- //mv_below8x8_curr for each 2x2 Inter Chroma prediction //------------------------------------------------------------------------- always @ (IsInterLuma or IsInterChroma or blk4x4_rec_counter[3:0] or mv_below8x8) if (IsInterLuma) case (blk4x4_rec_counter[3:2]) 2'b00:mv_below8x8_curr <= mv_below8x8[0]; 2'b01:mv_below8x8_curr <= mv_below8x8[1]; 2'b10:mv_below8x8_curr <= mv_below8x8[2]; 2'b11:mv_below8x8_curr <= mv_below8x8[3]; endcase else if (IsInterChroma) case (blk4x4_rec_counter[1:0]) 2'b00:mv_below8x8_curr <= mv_below8x8[0]; 2'b01:mv_below8x8_curr <= mv_below8x8[1]; 2'b10:mv_below8x8_curr <= mv_below8x8[2]; 2'b11:mv_below8x8_curr <= mv_below8x8[3]; endcase else mv_below8x8_curr <= 0; //---------------------------------------------------------------------------------------- //Inter_chroma2x2_counter to guide the prediction of 2x2 chroma blocks //2'b11 -> 2'b10 -> 2'b01 -> 2'b00 //---------------------------------------------------------------------------------------- reg [1:0] Inter_chroma2x2_counter; always @ (posedge clk) if (reset_n == 1'b0) Inter_chroma2x2_counter <= 0; //mv_below8x8_curr == 1'b1 includes the condition that "blk4x4_rec_counter > 15" else if (IsInterChroma && trigger_blk4x4_inter_pred && mv_below8x8_curr) Inter_chroma2x2_counter <= 2'b11; else if (blk4x4_inter_calculate_counter == 4'd1 && Inter_chroma2x2_counter != 0) Inter_chroma2x2_counter <= Inter_chroma2x2_counter - 1; //---------------------------------------------------------------------------------------- //trigger_blk2x2_inter_pred:only for chroma 2x2 decoding //We introduce this additional signal since we need Inter_chroma2x2_counter to update //one cycle before blk4x4_inter_calculate_counter //---------------------------------------------------------------------------------------- reg trigger_blk2x2_inter_pred; always @ (posedge clk) if (reset_n == 1'b0) trigger_blk2x2_inter_pred <= 0; else if ((IsInterChroma && trigger_blk4x4_inter_pred && mv_below8x8_curr) || (blk4x4_inter_calculate_counter == 4'd1 && Inter_chroma2x2_counter != 0)) trigger_blk2x2_inter_pred <= 1'b1; else trigger_blk2x2_inter_pred <= 1'b0; //---------------------------------------------------------------------------------------- //Inter motion vector for current 4x4 luma/chroma block or 2x2 chroma block // Inter_blk_mvx,Inter_blk_mvy //---------------------------------------------------------------------------------------- reg [7:0] Inter_blk_mvx,Inter_blk_mvy; always @ (blk4x4_rec_counter or mv_below8x8_curr or Inter_chroma2x2_counter or IsInterLuma or IsInterChroma or mv_is16x16 or mvx_CurrMb0 or mvx_CurrMb1 or mvx_CurrMb2 or mvx_CurrMb3 or mvy_CurrMb0 or mvy_CurrMb1 or mvy_CurrMb2 or mvy_CurrMb3) //Inter luma if (IsInterLuma) begin if (mv_is16x16) begin Inter_blk_mvx <= mvx_CurrMb0[7:0]; Inter_blk_mvy <= mvy_CurrMb0[7:0]; end else case (mv_below8x8_curr) 1'b0: case (blk4x4_rec_counter[3:2]) 2'b00:begin Inter_blk_mvx <= mvx_CurrMb0[7:0]; Inter_blk_mvy <= mvy_CurrMb0[7:0]; end 2'b01:begin Inter_blk_mvx <= mvx_CurrMb1[7:0]; Inter_blk_mvy <= mvy_CurrMb1[7:0]; end 2'b10:begin Inter_blk_mvx <= mvx_CurrMb2[7:0]; Inter_blk_mvy <= mvy_CurrMb2[7:0]; end 2'b11:begin Inter_blk_mvx <= mvx_CurrMb3[7:0]; Inter_blk_mvy <= mvy_CurrMb3[7:0]; end endcase 1'b1: case (blk4x4_rec_counter) 0 :begin Inter_blk_mvx <= mvx_CurrMb0[7:0]; Inter_blk_mvy <= mvy_CurrMb0[7:0]; end 1 :begin Inter_blk_mvx <= mvx_CurrMb0[15:8]; Inter_blk_mvy <= mvy_CurrMb0[15:8]; end 2 :begin Inter_blk_mvx <= mvx_CurrMb0[23:16];Inter_blk_mvy <= mvy_CurrMb0[23:16]; end 3 :begin Inter_blk_mvx <= mvx_CurrMb0[31:24];Inter_blk_mvy <= mvy_CurrMb0[31:24]; end 4 :begin Inter_blk_mvx <= mvx_CurrMb1[7:0]; Inter_blk_mvy <= mvy_CurrMb1[7:0]; end 5 :begin Inter_blk_mvx <= mvx_CurrMb1[15:8]; Inter_blk_mvy <= mvy_CurrMb1[15:8]; end 6 :begin Inter_blk_mvx <= mvx_CurrMb1[23:16];Inter_blk_mvy <= mvy_CurrMb1[23:16]; end 7 :begin Inter_blk_mvx <= mvx_CurrMb1[31:24];Inter_blk_mvy <= mvy_CurrMb1[31:24]; end 8 :begin Inter_blk_mvx <= mvx_CurrMb2[7:0]; Inter_blk_mvy <= mvy_CurrMb2[7:0]; end 9 :begin Inter_blk_mvx <= mvx_CurrMb2[15:8]; Inter_blk_mvy <= mvy_CurrMb2[15:8]; end 10:begin Inter_blk_mvx <= mvx_CurrMb2[23:16];Inter_blk_mvy <= mvy_CurrMb2[23:16]; end 11:begin Inter_blk_mvx <= mvx_CurrMb2[31:24];Inter_blk_mvy <= mvy_CurrMb2[31:24]; end 12:begin Inter_blk_mvx <= mvx_CurrMb3[7:0]; Inter_blk_mvy <= mvy_CurrMb3[7:0]; end 13:begin Inter_blk_mvx <= mvx_CurrMb3[15:8]; Inter_blk_mvy <= mvy_CurrMb3[15:8]; end 14:begin Inter_blk_mvx <= mvx_CurrMb3[23:16];Inter_blk_mvy <= mvy_CurrMb3[23:16]; end 15:begin Inter_blk_mvx <= mvx_CurrMb3[31:24];Inter_blk_mvy <= mvy_CurrMb3[31:24]; end default:begin Inter_blk_mvx <= 0;Inter_blk_mvy <= 0; end endcase endcase end //Inter chroma else if (IsInterChroma) begin if (mv_is16x16) begin Inter_blk_mvx <= mvx_CurrMb0[7:0]; Inter_blk_mvy <= mvy_CurrMb0[7:0]; end else case (blk4x4_rec_counter[1:0]) 2'b00: if (mv_below8x8_curr) //chroma2x2 prediction case (Inter_chroma2x2_counter) 3:begin Inter_blk_mvx <= mvx_CurrMb0[7:0]; Inter_blk_mvy <= mvy_CurrMb0[7:0]; end 2:begin Inter_blk_mvx <= mvx_CurrMb0[15:8]; Inter_blk_mvy <= mvy_CurrMb0[15:8]; end 1:begin Inter_blk_mvx <= mvx_CurrMb0[23:16];Inter_blk_mvy <= mvy_CurrMb0[23:16]; end 0:begin Inter_blk_mvx <= mvx_CurrMb0[31:24];Inter_blk_mvy <= mvy_CurrMb0[31:24]; end endcase else //chroma 4x4 prediction begin Inter_blk_mvx <= mvx_CurrMb0[7:0]; Inter_blk_mvy <= mvy_CurrMb0[7:0]; end 2'b01: if (mv_below8x8_curr) //need chroma2x2 prediction case (Inter_chroma2x2_counter) 3:begin Inter_blk_mvx <= mvx_CurrMb1[7:0]; Inter_blk_mvy <= mvy_CurrMb1[7:0]; end 2:begin Inter_blk_mvx <= mvx_CurrMb1[15:8]; Inter_blk_mvy <= mvy_CurrMb1[15:8]; end 1:begin Inter_blk_mvx <= mvx_CurrMb1[23:16];Inter_blk_mvy <= mvy_CurrMb1[23:16]; end 0:begin Inter_blk_mvx <= mvx_CurrMb1[31:24];Inter_blk_mvy <= mvy_CurrMb1[31:24]; end endcase else //chroma 4x4 prediction begin Inter_blk_mvx <= mvx_CurrMb1[7:0]; Inter_blk_mvy <= mvy_CurrMb1[7:0]; end 2'b10: if (mv_below8x8_curr) //chroma2x2 prediction case (Inter_chroma2x2_counter) 3:begin Inter_blk_mvx <= mvx_CurrMb2[7:0]; Inter_blk_mvy <= mvy_CurrMb2[7:0]; end 2:begin Inter_blk_mvx <= mvx_CurrMb2[15:8]; Inter_blk_mvy <= mvy_CurrMb2[15:8]; end 1:begin Inter_blk_mvx <= mvx_CurrMb2[23:16];Inter_blk_mvy <= mvy_CurrMb2[23:16]; end 0:begin Inter_blk_mvx <= mvx_CurrMb2[31:24];Inter_blk_mvy <= mvy_CurrMb2[31:24]; end endcase else //chroma 4x4 prediction begin Inter_blk_mvx <= mvx_CurrMb2[7:0]; Inter_blk_mvy <= mvy_CurrMb2[7:0]; end 2'b11: if (mv_below8x8_curr) //chroma2x2 prediction case (Inter_chroma2x2_counter) 3:begin Inter_blk_mvx <= mvx_CurrMb3[7:0]; Inter_blk_mvy <= mvy_CurrMb3[7:0]; end 2:begin Inter_blk_mvx <= mvx_CurrMb3[15:8]; Inter_blk_mvy <= mvy_CurrMb3[15:8]; end 1:begin Inter_blk_mvx <= mvx_CurrMb3[23:16];Inter_blk_mvy <= mvy_CurrMb3[23:16]; end 0:begin Inter_blk_mvx <= mvx_CurrMb3[31:24];Inter_blk_mvy <= mvy_CurrMb3[31:24]; end endcase else //chroma 4x4 prediction begin Inter_blk_mvx <= mvx_CurrMb3[7:0]; Inter_blk_mvy <= mvy_CurrMb3[7:0]; end endcase end else begin Inter_blk_mvx <= 0; Inter_blk_mvy <= 0; end //---------------------------------------------------------------------------------------- //Describes the offset of each blk4x4 inside a MB //---------------------------------------------------------------------------------------- // xOffset = 0 for 0,2,8, 10 yOffset = 0 for 0, 1, 4, 5 // xOffset = 4 for 1,3,9, 11 yOffset = 4 for 2, 3, 6, 7 // xOffset = 8 for 4,6,12,14 yOffset = 8 for 8, 9, 12,13 // xOffset = 12 for 5,7,13,15 yOffset = 12 for 10,11,14,15 reg [3:0] xOffsetL,yOffsetL; always @ (IsInterLuma or mv_below8x8_curr or blk4x4_rec_counter[2] or blk4x4_rec_counter[0]) if (IsInterLuma) begin if (!mv_below8x8_curr) xOffsetL <= (blk4x4_rec_counter[2])? 4'd8:4'd0; else case ({blk4x4_rec_counter[2],blk4x4_rec_counter[0]}) 2'b00:xOffsetL <= 4'd0; 2'b01:xOffsetL <= 4'd4; 2'b10:xOffsetL <= 4'd8; 2'b11:xOffsetL <= 4'd12; endcase end else xOffsetL <= 0; always @ (IsInterLuma or mv_below8x8_curr or blk4x4_rec_counter[3] or blk4x4_rec_counter[1]) if (IsInterLuma) begin if (!mv_below8x8_curr) yOffsetL <= (blk4x4_rec_counter[3])? 4'd8:4'd0; else case ({blk4x4_rec_counter[3],blk4x4_rec_counter[1]}) 2'b00:yOffsetL <= 4'd0; 2'b01:yOffsetL <= 4'd4; 2'b10:yOffsetL <= 4'd8; 2'b11:yOffsetL <= 4'd12; endcase
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