inter_mv_decoding.v

a H.264/AVC Baseline Decoder

				case (sub_mb_type)
					0:mvpCy <= mvy_CurrMb1[23:16]; 
					1:	//8x4
					case (subMbPartIdx)
						0:mvpCy <= mvy_CurrMb1[23:16];	
						1:if (mb_num_h == 0)	mvpCy <= 0;
						  else 					mvpCy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrD;
						default:mvpCy <= 0;
					endcase	
					2:	//4x8
					case (subMbPartIdx)
						0:mvpCy <= mvy_CurrMb0[31:24];	1:mvpCy <= mvy_CurrMb1[23:16];	default:mvpCy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpCy <= mvy_CurrMb0[31:24];	1:mvpCy <= mvy_CurrMb1[23:16];
						2:mvpCy <= mvy_CurrMb2[15:8];	3:mvpCy <= mvy_CurrMb2[7:0]; 
					endcase
				endcase
				3:
				case (sub_mb_type)
					0:mvpCy <= mvy_CurrMb0[31:24]; 
					1:	//8x4
					case (subMbPartIdx)
						0:mvpCy <= mvy_CurrMb0[31:24];	1:mvpCy <= mvy_CurrMb2[15:8];	default:mvpCy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpCy <= mvy_CurrMb1[31:24];	1:mvpCy <= mvy_CurrMb1[23:16];	default:mvpCy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpCy <= mvy_CurrMb1[31:24];	1:mvpCy <= mvy_CurrMb1[23:16];
						2:mvpCy <= mvy_CurrMb3[15:8];	3:mvpCy <= mvy_CurrMb3[7:0]; 
					endcase
				endcase
			endcase
		else
			mvpCy <= 0;	
	//------------------------------------------------		
	//obtain motion vector prediction for current Blk
	//------------------------------------------------
	wire [8:0] sub_ABx,sub_ACx,sub_BCx;
	wire flag_ABx,flag_ACx,flag_BCx; 
	assign sub_ABx = {mvpAx[7],mvpAx[7:0]} - {mvpBx[7],mvpBx[7:0]};
	assign sub_ACx = {mvpAx[7],mvpAx[7:0]} - {mvpCx[7],mvpCx[7:0]};
	assign sub_BCx = {mvpBx[7],mvpBx[7:0]} - {mvpCx[7],mvpCx[7:0]};
	assign flag_ABx = sub_ABx[8];
	assign flag_ACx = sub_ACx[8];
	assign flag_BCx = sub_BCx[8];
	
	reg [7:0] mvpx_median;
	always @ (flag_ABx or flag_ACx or flag_BCx or mvpAx or mvpBx or mvpCx)
		if (((flag_ABx == 1'b1) && (flag_ACx == 1'b0)) || ((flag_ABx == 1'b0) && (flag_ACx == 1'b1))) 
			mvpx_median <= mvpAx;
		else if (((flag_ABx == 1'b0) && (flag_BCx == 1'b0)) || ((flag_ABx == 1'b1) && (flag_BCx == 1'b1))) 
			mvpx_median <= mvpBx;
		else 
			mvpx_median <= mvpCx;
			
	always @ (refIdxL0_A or refIdxL0_B or refIdxL0_C or mvpAx or mvpBx or mvpCx or mvpx_median)
		case ({refIdxL0_A,refIdxL0_B,refIdxL0_C})
			3'b011:mvpx <= mvpAx;
			3'b101:mvpx <= mvpBx;
			3'b110:mvpx <= mvpCx;
			default:mvpx <= mvpx_median;
		endcase
	
	wire [8:0] sub_ABy,sub_ACy,sub_BCy;
	wire flag_ABy,flag_ACy,flag_BCy; 
	assign sub_ABy = {mvpAy[7],mvpAy[7:0]} - {mvpBy[7],mvpBy[7:0]};
	assign sub_ACy = {mvpAy[7],mvpAy[7:0]} - {mvpCy[7],mvpCy[7:0]};
	assign sub_BCy = {mvpBy[7],mvpBy[7:0]} - {mvpCy[7],mvpCy[7:0]};
	assign flag_ABy = sub_ABy[8];
	assign flag_ACy = sub_ACy[8];
	assign flag_BCy = sub_BCy[8];
	
	reg [7:0] mvpy_median;
	always @ (flag_ABy or flag_ACy or flag_BCy or mvpAy or mvpBy or mvpCy)
		if (((flag_ABy == 1'b1) && (flag_ACy == 1'b0)) || ((flag_ABy == 1'b0) && (flag_ACy == 1'b1))) 
			mvpy_median <= mvpAy;
		else if (((flag_ABy == 1'b0) && (flag_BCy == 1'b0)) || ((flag_ABy == 1'b1) && (flag_BCy == 1'b1))) 
			mvpy_median <= mvpBy;
		else 
			mvpy_median <= mvpCy;
			
	always @ (refIdxL0_A or refIdxL0_B or refIdxL0_C or mvpAy or mvpBy or mvpCy or mvpy_median)
		case ({refIdxL0_A,refIdxL0_B,refIdxL0_C})
			3'b011:mvpy <= mvpAy;
			3'b101:mvpy <= mvpBy;
			3'b110:mvpy <= mvpCy;
			default:mvpy <= mvpy_median;
		endcase
		
	always @ (Is_skipMB_mv_calc or mb_num_h or mb_num_v or mb_pred_state or sub_mb_pred_state or compIdx or mvpx or mvpy 
		or mvd or mvpAx or mvpBx or mvpCx or mvpAy or mvpBy or mvpCy or mb_type_general or mbPartIdx 
		or refIdxL0_A or refIdxL0_B or refIdxL0_C)
		if (Is_skipMB_mv_calc)
			begin
				//Refer to Page113,section 8.4.1.1 of H.264/AVC 2003.05 standard
				if (mb_num_h == 0 || mb_num_v == 0 || (refIdxL0_A == 0 && mvpAx == 0 && mvpAy == 0) || 
					(refIdxL0_B == 0 && mvpBx == 0 && mvpBy == 0))
					begin mvx <= 0;		mvy <= 0;		end
				else
					begin mvx <= mvpx;	mvy <= mvpy;	end
			end
		else if (mb_pred_state == `mvd_l0_s || sub_mb_pred_state == `sub_mvd_l0_s)
			begin
				if (mb_type_general == `MB_Inter16x8)		//16x8
					case (mbPartIdx)
						2'b00:					//upper blk
						if (!refIdxL0_B)
							begin
								mvx <= (compIdx == 0)? (mvpBx + mvd):0;
								mvy <= (compIdx == 1)? (mvpBy + mvd):0;
							end
						else
							begin
								mvx <= (compIdx == 0)? (mvpx + mvd):0;
								mvy <= (compIdx == 1)? (mvpy + mvd):0;
							end
						default:				//bottom blk
						if (!refIdxL0_A)
							begin
								mvx <= (compIdx == 0)? (mvpAx + mvd):0;
								mvy <= (compIdx == 1)? (mvpAy + mvd):0;
							end
						else
							begin
								mvx <= (compIdx == 0)? (mvpx + mvd):0;
								mvy <= (compIdx == 1)? (mvpy + mvd):0;
							end
					endcase
				else if (mb_type_general == `MB_Inter8x16)	//8x16
					case (mbPartIdx)
						2'b00:					//left blk
						if (!refIdxL0_A)
							begin
								mvx <= (compIdx == 0)? (mvpAx + mvd):0;
								mvy <= (compIdx == 1)? (mvpAy + mvd):0;
							end
						else
							begin
								mvx <= (compIdx == 0)? (mvpx + mvd):0;
								mvy <= (compIdx == 1)? (mvpy + mvd):0;
							end
						default:				//right blk
						//if mbAddrC is not available but mbAddrB (= mbAddrD) is INTER available (not only available,but also inter
						//available),it still predicted from mbAddrC <- mbAddrD
						if (!refIdxL0_C || (mb_num_h == 10 && !refIdxL0_B)) 
							begin													
								mvx <= (compIdx == 0)? (mvpCx + mvd):0;				 
								mvy <= (compIdx == 1)? (mvpCy + mvd):0;
							end
						else
							begin
								mvx <= (compIdx == 0)? (mvpx + mvd):0;
								mvy <= (compIdx == 1)? (mvpy + mvd):0;
							end
					endcase
				else
					begin
						mvx <= (compIdx == 0)? (mvpx + mvd):0;
						mvy <= (compIdx == 1)? (mvpy + mvd):0;
					end
			end		
		else
			begin
				mvx <= 0;	mvy <= 0;
			end
	//-----------------------------------------------------		
	//Current MB write --> CurrMb0,CurrMb1,CurrMb2,CurrMb3
	//-----------------------------------------------------
	always @ (posedge clk)
		if (reset_n == 0)
			mv_is16x16 <= 0;
		else if (mb_type_general == `MB_Inter16x16 || mb_type_general == `MB_P_skip)
			mv_is16x16 <= 1;
		else 
			mv_is16x16 <= 0;
	
	always @ (posedge clk)
		if (reset_n == 0)
			begin
				mvx_CurrMb0 <= 0;	mvx_CurrMb1 <= 0;	mvx_CurrMb2 <= 0;	mvx_CurrMb3 <= 0;
			end
		//Inter16x16 or P_skip
		else if (Is_skipMB_mv_calc || (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x16 && compIdx == 0)) 
			mvx_CurrMb0[7:0] <= mvx;
		//Inter16x8
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x8 && compIdx == 0)
			case (mbPartIdx)
				0:begin	mvx_CurrMb0 <= {mvx,mvx,mvx,mvx};	mvx_CurrMb1 <= {mvx,mvx,mvx,mvx};	end
				1:begin	mvx_CurrMb2 <= {mvx,mvx,mvx,mvx};	mvx_CurrMb3 <= {mvx,mvx,mvx,mvx};	end
			endcase
		//Inter8x16
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter8x16  && compIdx == 0)
			case (mbPartIdx)
				0:begin	mvx_CurrMb0 <= {mvx,mvx,mvx,mvx};	mvx_CurrMb2 <= {mvx,mvx,mvx,mvx};	end
				1:begin	mvx_CurrMb1 <= {mvx,mvx,mvx,mvx};	mvx_CurrMb3 <= {mvx,mvx,mvx,mvx};	end
			endcase
		//Inter8x8
		else if (sub_mb_pred_state == `sub_mvd_l0_s && compIdx == 0)	
			case (mbPartIdx)
				0:
				case (sub_mb_type)
					0:mvx_CurrMb0 <= {mvx,mvx,mvx,mvx};
					1:	//8x4
					case (subMbPartIdx)
						0:begin	mvx_CurrMb0[7:0]   <= mvx;	mvx_CurrMb0[15:8]  <= mvx;	end
						1:begin	mvx_CurrMb0[23:16] <= mvx;	mvx_CurrMb0[31:24] <= mvx;	end
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:begin	mvx_CurrMb0[7:0]  <= mvx;	mvx_CurrMb0[23:16] <= mvx;	end
						1:begin	mvx_CurrMb0[15:8] <= mvx;	mvx_CurrMb0[31:24] <= mvx;	end
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvx_CurrMb0[7:0]   <= mvx;
						1:mvx_CurrMb0[15:8]  <= mvx;
						2:mvx_CurrMb0[23:16] <= mvx;
						3:mvx_CurrMb0[31:24] <= mvx; 
					endcase
				endcase
				1:
				case (sub_mb_type)
					0:mvx_CurrMb1 <= {mvx,mvx,mvx,mvx};
					1:	//8x4
					case (subMbPartIdx)
						0:begin	mvx_CurrMb1[7:0]   <= mvx;	mvx_CurrMb1[15:8]  <= mvx;	end
						1:begin	mvx_CurrMb1[23:16] <= mvx;	mvx_CurrMb1[31:24] <= mvx;	end
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:begin	mvx_CurrMb1[7:0]  <= mvx;	mvx_CurrMb1[23:16] <= mvx;	end
						1:begin	mvx_CurrMb1[15:8] <= mvx;	mvx_CurrMb1[31:24] <= mvx;	end
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvx_CurrMb1[7:0]   <= mvx;
						1:mvx_CurrMb1[15:8]  <= mvx;
						2:mvx_CurrMb1[23:16] <= mvx;
						3:mvx_CurrMb1[31:24] <= mvx; 
					endcase
				endcase
				2:
				case (sub_mb_type)
					0:mvx_CurrMb2 <= {mvx,mvx,mvx,mvx};
					1:	//8x4
					case (subMbPartIdx)
						0:begin	mvx_CurrMb2[7:0]   <= mvx;	mvx_CurrMb2[15:8]  <= mvx;	end
						1:begin	mvx_CurrMb2[23:16] <= mvx;	mvx_CurrMb2[31:24] <= mvx;	end
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:begin	mvx_CurrMb2[7:0]  <= mvx;	mvx_CurrMb2[23:16] <= mvx;	end
						1:begin	mvx_CurrMb2[15:8] <= mvx;	mvx_CurrMb2[31:24] <= mvx;	end
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvx_CurrMb2[7:0]   <= mvx;
						1:mvx_CurrMb2[15:8]  <= mvx;
						2:mvx_CurrMb2[23:16] <= mvx;
						3:mvx_CurrMb2[31:24] <= mvx; 
					endcase
				endcase
				3:
				case (sub_mb_type)
					0:mvx_CurrMb3 <= {mvx,mvx,mvx,mvx};
					1:	//8x4
					case (subMbPartIdx)
						0:begin	mvx_CurrMb3[7:0]   <= mvx;	mvx_CurrMb3[15:8]  <= mvx;	end
						1:begin	mvx_CurrMb3[23:16] <= mvx;	mvx_CurrMb3[31:24] <= mvx;	end
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:begin	mvx_CurrMb3[7:0]  <= mvx;	mvx_CurrMb3[23:16] <= mvx;	end
						1:begin	mvx_CurrMb3[15:8] <= mvx;	mvx_CurrMb3[31:24] <= mvx;	end
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvx_CurrMb3[7:0]   <= mvx;
						1:mvx_CurrMb3[15:8]  <= mvx;
						2:mvx_CurrMb3[23:16] <= mvx;
						3:mvx_CurrMb3[31:24] <= mvx; 
					endcase
				endcase
			endcase	
	always @ (posedge clk)
		if (reset_n == 0)
			begin
				mvy_CurrMb0 <= 0;	mvy_CurrMb1 <= 0;	mvy_CurrMb2 <= 0;	mvy_CurrMb3 <= 0;
			end
		//Inter16x16 or P_skip
		else if (Is_skipMB_mv_calc || (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x16 && compIdx == 1)) 
			begin 
				mvy_CurrMb0[7:0] <= mvy;
			end
		//Inter16x8
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x8 && compIdx == 1)
			case (mbPartIdx)
				0:begin	mvy_CurrMb0 <= {mvy,mvy,mvy,mvy};	mvy_CurrMb1 <= {mvy,mvy,mvy,mvy};	end
				1:begin	mvy_CurrMb2 <= {mvy,mvy,mvy,mvy};	mvy_CurrMb3 <= {mvy,mvy,mvy,mvy};	end
			endcase
		//Inter8x16
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter8x16  && compIdx == 1)
			case (mbPartIdx)
				0:begin	mvy_CurrMb0 <= {mvy,mvy,mvy,mvy};	mvy_CurrMb2 <= {mvy,mvy,mvy,mvy};	end
				1:begin	mvy_CurrMb1 <= {mvy,mvy,mvy,mvy};	mvy_CurrMb3 <= {mvy,mvy,mvy,mvy};	end
			endcase
		//Inter8x8
		else if (sub_mb_pred_state == `sub_mvd_l0_s && compIdx == 1)	
			case (mbPartIdx)
				0:
				case (sub_mb_type)
					0:mvy_CurrMb0 <= {mvy,mvy,mvy,mvy};
					1:	//8x4
					case (subMbPartIdx)
						0:begin	mvy_CurrMb0[7:0]   <= mvy;	mvy_CurrMb0[15:8]  <= mvy;	end
						1:begin	mvy_CurrMb0[23:16] <= mvy;	mvy_CurrMb0[31:24] <= mvy;	end
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:begin	mvy_CurrMb0[7:0]  <= mvy;	mvy_CurrMb0[23:16] <= mvy;	end
						1:begin	mvy_CurrMb0[15:8] <= mvy;	mvy_CurrMb0[31:24] <= mvy;	end
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvy_CurrMb0[7:0]   <= mvy;
						1:mvy_CurrMb0[15:8]  <= mvy;
						2:mvy_CurrMb0[23:16] <= mvy;
						3:mvy_CurrMb0[31:24] <= mvy; 
					endcase
				endcase
				1:
				case (sub_mb_type)
					0:mvy_CurrMb1 <= {mvy,mvy,mvy,mvy};
					1:	//8x4
					case (subMbPartIdx)
						0:begin	mvy_CurrMb1[7:0]   <= mvy;	mvy_CurrMb1[15:8]  <= mvy;	end
						1:begin	mvy_CurrMb1[23:16] <= mvy;	mvy_CurrMb1[31:24] <= mvy;	end
					endcase