inter_mv_decoding.v

a H.264/AVC Baseline Decoder

						  else 						mvpBy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[23:16];	
						default:mvpBy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:if      (mb_num == 0)		mvpBy <= 0;
					  	  else if (mb_num_v == 0) 	mvpBy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
					  	  else 						mvpBy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[31:24];
						1:if      (mb_num_v == 0) 	mvpBy <= mvy_CurrMb0[7:0];
						  else 						mvpBy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[23:16];
						2:mvpBy <= mvy_CurrMb0[7:0];
						3:mvpBy <= mvy_CurrMb0[15:8]; 
					endcase
				endcase
				1:
				case (sub_mb_type)
					0:mvpBy <= (mb_num_v == 0)? mvy_CurrMb0[15:8]:((MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[15:8]); 
					1:	//8x4
					case (subMbPartIdx)
						0:mvpBy <= (mb_num_v == 0)? mvy_CurrMb0[15:8]:((MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[15:8]);
						1:mvpBy <= mvy_CurrMb1[7:0];
						default:mvpBy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpBy <= (mb_num_v == 0)? mvy_CurrMb0[15:8]:((MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[15:8]);
						1:mvpBy <= (mb_num_v == 0)? mvy_CurrMb1[7:0] :((MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[7:0]);
						default:mvpBy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpBy <= (mb_num_v == 0)? mvy_CurrMb0[15:8]:((MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[15:8]);
						1:mvpBy <= (mb_num_v == 0)? mvy_CurrMb1[7:0] :((MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[7:0]);
						2:mvpBy <= mvy_CurrMb1[7:0];
						3:mvpBy <= mvy_CurrMb1[15:8]; 
					endcase
				endcase
				2:
				case (sub_mb_type)
					0:mvpBy <= mvy_CurrMb0[23:16]; 
					1:	//8x4
					case (subMbPartIdx)
						0:mvpBy <= mvy_CurrMb0[23:16];	1:mvpBy <= mvy_CurrMb2[7:0];	default:mvpBy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpBy <= mvy_CurrMb0[23:16];	1:mvpBy <= mvy_CurrMb0[31:24];	default:mvpBy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpBy <= mvy_CurrMb0[23:16];	1:mvpBy <= mvy_CurrMb0[31:24];
						2:mvpBy <= mvy_CurrMb2[7:0];	3:mvpBy <= mvy_CurrMb2[15:8]; 
					endcase
				endcase
				3:
				case (sub_mb_type)
					0:mvpBy <= mvy_CurrMb1[23:16]; 
					1:	//8x4
					case (subMbPartIdx)
						0:mvpBy <= mvy_CurrMb1[23:16];	1:mvpBy <= mvy_CurrMb3[7:0];	default:mvpBy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpBy <= mvy_CurrMb1[23:16];	1:mvpBy <= mvy_CurrMb1[31:24];	default:mvpBy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpBy <= mvy_CurrMb1[23:16];	1:mvpBy <= mvy_CurrMb1[31:24];
						2:mvpBy <= mvy_CurrMb3[7:0];	3:mvpBy <= mvy_CurrMb3[15:8]; 
					endcase
				endcase
			endcase
		else
			mvpBy <= 0;	 
	//-------------
	//mvpCx
	//-------------
	//if C is not available,it can be predicted from D,then from A
	always @ (Is_skipMB_mv_calc or mb_pred_state or sub_mb_pred_state or mb_num or mb_num_h or mb_num_v 
		or mb_type_general or sub_mb_type or mbPartIdx or subMbPartIdx or compIdx 
		or MBTypeGen_mbAddrA[1] or MBTypeGen_mbAddrB[1] or MBTypeGen_mbAddrC[1] or MBTypeGen_mbAddrD 
		or mvx_mbAddrA or mvx_mbAddrB_dout or mvx_mbAddrC_dout or mvx_mbAddrD 
		or mvx_CurrMb0 or mvx_CurrMb1 or mvx_CurrMb2 or mvx_CurrMb3 
		or refIdxL0_A or refIdxL0_B or refIdxL0_C) 
		//P_skip,Inter16x16
		if (Is_skipMB_mv_calc || (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x16 && compIdx == 0))
			begin
				if      (mb_num == 0)	 mvpCx <= 0;
				else if (mb_num_v == 0)	 mvpCx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
				else if (mb_num_h == 10) mvpCx <= (MBTypeGen_mbAddrD    == 1)? 0:mvx_mbAddrD;
				else					 mvpCx <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvx_mbAddrC_dout;
			end
		//Inter16x8
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x8 && compIdx == 0)
			begin
				if (mbPartIdx == 0)	
					mvpCx <= (refIdxL0_B && !refIdxL0_C)? ((mb_num_h == 10)? mvx_mbAddrD:mvx_mbAddrC_dout):0;
				else
					mvpCx <= 0;
			end
		//Inter8x16
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter8x16 && compIdx == 0)
			begin
				//when mbAddrA is not available,Inter8x16 left blk needs to have its mbAddrC (= mbAddrB of upper line) derived
				if (mbPartIdx == 0)	//left blk	
					mvpCx <= (refIdxL0_A && !refIdxL0_B)? mvx_mbAddrB_dout[15:8]:0;
				else				//right blk
					begin
						if      (mb_num == 0)	 mvpCx <= 0;
						else if (mb_num_v == 0)	 mvpCx <= mvx_CurrMb0[15:8];
						else if (mb_num_h == 10) mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[23:16];
						else					 mvpCx <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvx_mbAddrC_dout;
					end
		  	end
		//Inter8x8
		else if (sub_mb_pred_state == `sub_mvd_l0_s && compIdx == 0)	
			case (mbPartIdx)
				0:
				case (sub_mb_type)
					0:if      (mb_num == 0)	  mvpCx <= 0;
					  else if (mb_num_v == 0) mvpCx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
					  else 					  mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[15:8];
					1:  //8x4
					case (subMbPartIdx)
						0:if      (mb_num == 0)	  mvpCx <= 0;
					      else if (mb_num_v == 0) mvpCx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
					      else 					  mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[15:8];
						1:if (mb_num_h == 0)      mvpCx <= 0;
						  else					  mvpCx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrD;
						default:mvpCx <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:if      (mb_num == 0)	  mvpCx <= 0;
					      else if (mb_num_v == 0) mvpCx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
					      else 					  mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[23:16];
						1:if      (mb_num_v == 0) mvpCx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_CurrMb0[7:0];
						  else 					  mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[15:8];	
						default:mvpCx <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:if      (mb_num == 0)	  mvpCx <= 0;
					      else if (mb_num_v == 0) mvpCx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
					      else 					  mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[23:16];
						1:if      (mb_num_v == 0) mvpCx <= mvx_CurrMb0[7:0];
						  else 					  mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[15:8];	
						2:mvpCx <= mvx_CurrMb0[15:8]; //always available
						3:mvpCx <= mvx_CurrMb0[7:0];  //always from D
					endcase
				endcase
				1:
				case (sub_mb_type)
					0:if (mb_num_v == 0)	mvpCx <= mvx_CurrMb0[15:8];
					  else if (mb_num_h == 10) //predicted from D,but lies initial mbAddrB
											mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[23:16];
					  else					mvpCx <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvx_mbAddrC_dout; 
					1:	//8x4
					case (subMbPartIdx)
						0:if (mb_num_v == 0)	mvpCx <= mvx_CurrMb0[15:8];
					      else if (mb_num_h == 10) //predicted from D,but lies initial mbAddrB
							  					mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[23:16];
					  	  else					mvpCx <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvx_mbAddrC_dout;
						1:mvpCx <= mvx_CurrMb0[15:8]; //C is always unavailable,D is always available
						default:mvpCx <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:if (mb_num_v == 0)	mvpCx <= mvx_CurrMb0[15:8];
						  else 					mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[7:0]; 
						1:if (mb_num_v == 0)	mvpCx <= mvx_CurrMb1[7:0];
					      else if (mb_num_h == 10) //predicted from D,but lies in mbAddrB
												mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[15:8];
					  	  else					mvpCx <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvx_mbAddrC_dout;
						default:mvpCx <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:if (mb_num_v == 0)	mvpCx <= mvx_CurrMb0[15:8];
						  else 					mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[7:0]; 
						1:if (mb_num_v == 0)	mvpCx <= mvx_CurrMb1[7:0];
					      else if (mb_num_h == 10) //predicted from D,but lies initial mbAddrB
												mvpCx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[15:8];
					  	  else					mvpCx <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvx_mbAddrC_dout;	
						2:mvpCx <= mvx_CurrMb1[15:8];
						3:mvpCx <= mvx_CurrMb1[7:0]; 
					endcase
				endcase
				2:
				case (sub_mb_type)
					0:mvpCx <= mvx_CurrMb1[23:16]; 
					1:	//8x4
					case (subMbPartIdx)
						0:mvpCx <= mvx_CurrMb1[23:16];	
						1:if (mb_num_h == 0)	mvpCx <= 0;
						  else 					mvpCx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrD;
						default:mvpCx <= 0;
					endcase	
					2:	//4x8
					case (subMbPartIdx)
						0:mvpCx <= mvx_CurrMb0[31:24];	1:mvpCx <= mvx_CurrMb1[23:16];	default:mvpCx <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpCx <= mvx_CurrMb0[31:24];	1:mvpCx <= mvx_CurrMb1[23:16];
						2:mvpCx <= mvx_CurrMb2[15:8];	3:mvpCx <= mvx_CurrMb2[7:0]; 
					endcase
				endcase
				3:
				case (sub_mb_type)
					0:mvpCx <= mvx_CurrMb0[31:24]; 
					1:	//8x4
					case (subMbPartIdx)
						0:mvpCx <= mvx_CurrMb0[31:24];	1:mvpCx <= mvx_CurrMb2[15:8];	default:mvpCx <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpCx <= mvx_CurrMb1[31:24];	1:mvpCx <= mvx_CurrMb1[23:16];	default:mvpCx <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpCx <= mvx_CurrMb1[31:24];	1:mvpCx <= mvx_CurrMb1[23:16];
						2:mvpCx <= mvx_CurrMb3[15:8];	3:mvpCx <= mvx_CurrMb3[7:0]; 
					endcase
				endcase
			endcase
		else
			mvpCx <= 0;	
	//-------------
	//mvpCy
	//-------------
	//if C is not available,it can be predicted from D,then from A
	always @ (Is_skipMB_mv_calc or mb_pred_state or sub_mb_pred_state or mb_num or mb_num_h or mb_num_v 
		or mb_type_general or sub_mb_type or mbPartIdx or subMbPartIdx or compIdx 
		or MBTypeGen_mbAddrA[1] or MBTypeGen_mbAddrB[1] or MBTypeGen_mbAddrC[1] or MBTypeGen_mbAddrD 
		or mvy_mbAddrA or mvy_mbAddrB_dout or mvy_mbAddrC_dout or mvy_mbAddrD 
		or mvy_CurrMb0 or mvy_CurrMb1 or mvy_CurrMb2 or mvy_CurrMb3
		or refIdxL0_A or refIdxL0_B or refIdxL0_C)
		//P_skip,Inter16x16
		if (Is_skipMB_mv_calc || (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x16 && compIdx == 1))
			begin
				if      (mb_num == 0)	 mvpCy <= 0;
				else if (mb_num_v == 0)	 mvpCy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
				else if (mb_num_h == 10) mvpCy <= (MBTypeGen_mbAddrD    == 1)? 0:mvy_mbAddrD;
				else					 mvpCy <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvy_mbAddrC_dout;
			end
		//Inter16x8
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x8 && compIdx == 1)
			begin
				if (mbPartIdx == 0)	
					mvpCy <= (refIdxL0_B && !refIdxL0_C)? ((mb_num_h == 10)? mvy_mbAddrD:mvy_mbAddrC_dout):0;
				else
					mvpCy <= 0;
			end
		//Inter8x16
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter8x16 && compIdx == 1)
			begin
				//when mbAddrA is not available,Inter8x16 left blk needs to have its mbAddrC (= mbAddrB of upper line) derived
				if (mbPartIdx == 0)	//left blk	
					mvpCy <= (refIdxL0_A && !refIdxL0_B)? mvy_mbAddrB_dout[15:8]:0;
				else				//right blk
					begin
						if      (mb_num == 0)	 mvpCy <= 0;
						else if (mb_num_v == 0)	 mvpCy <= mvy_CurrMb0[15:8];
						else if (mb_num_h == 10) mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[23:16];
						else					 mvpCy <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvy_mbAddrC_dout;
					end
		  	end
		//Inter8x8
		else if (sub_mb_pred_state == `sub_mvd_l0_s && compIdx == 1)	
			case (mbPartIdx)
				0:
				case (sub_mb_type)
					0:if      (mb_num == 0)	  mvpCy <= 0;
					  else if (mb_num_v == 0) mvpCy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
					  else 					  mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[15:8];
					1:  //8x4
					case (subMbPartIdx)
						0:if      (mb_num == 0)	  mvpCy <= 0;
					      else if (mb_num_v == 0) mvpCy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
					      else 					  mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[15:8];
						1:if (mb_num_h == 0)      mvpCy <= 0;
						  else					  mvpCy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrD;
						default:mvpCy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:if      (mb_num == 0)	  mvpCy <= 0;
					      else if (mb_num_v == 0) mvpCy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
					      else 					  mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[23:16];
						1:if      (mb_num_v == 0) mvpCy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_CurrMb0[7:0];
						  else 					  mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[15:8];	
						default:mvpCy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:if      (mb_num == 0)	  mvpCy <= 0;
					      else if (mb_num_v == 0) mvpCy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
					      else 					  mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[23:16];
						1:if      (mb_num_v == 0) mvpCy <= mvy_CurrMb0[7:0];
						  else 					  mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[15:8];	
						2:mvpCy <= mvy_CurrMb0[15:8]; //always available
						3:mvpCy <= mvy_CurrMb0[7:0];  //always from D
					endcase
				endcase
				1:
				case (sub_mb_type)
					0:if (mb_num_v == 0)	mvpCy <= mvy_CurrMb0[15:8];
					  else if (mb_num_h == 10) //predicted from D,but lies initial mbAddrB
											mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[23:16];
					  else					mvpCy <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvy_mbAddrC_dout; 
					1:	//8x4
					case (subMbPartIdx)
						0:if (mb_num_v == 0)	mvpCy <= mvy_CurrMb0[15:8];
					      else if (mb_num_h == 10) //predicted from D,but lies initial mbAddrB
							  					mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[23:16];
					  	  else					mvpCy <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvy_mbAddrC_dout;
						1:mvpCy <= mvy_CurrMb0[15:8]; //C is always unavailable,D is always available
						default:mvpCy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:if (mb_num_v == 0)	mvpCy <= mvy_CurrMb0[15:8];
						  else 					mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[7:0]; 
						1:if (mb_num_v == 0)	mvpCy <= mvy_CurrMb1[7:0];
					      else if (mb_num_h == 10) //predicted from D,but lies in mbAddrB
												mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[15:8];
					  	  else					mvpCy <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvy_mbAddrC_dout;
						default:mvpCy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:if (mb_num_v == 0)	mvpCy <= mvy_CurrMb0[15:8];
						  else 					mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[7:0]; 
						1:if (mb_num_v == 0)	mvpCy <= mvy_CurrMb1[7:0];
					      else if (mb_num_h == 10) //predicted from D,but lies initial mbAddrB
												mvpCy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[15:8];
					  	  else					mvpCy <= (MBTypeGen_mbAddrC[1] == 1)? 0:mvy_mbAddrC_dout;	
						2:mvpCy <= mvy_CurrMb1[15:8];
						3:mvpCy <= mvy_CurrMb1[7:0]; 
					endcase
				endcase
				2: