inter_mv_decoding.v

a H.264/AVC Baseline Decoder

					endcase
				endcase
				3:
				case (sub_mb_type)
					0:mvpAx <= mvx_CurrMb2[15:8];
					1:	//8x4
					case (subMbPartIdx)
						0:mvpAx <= mvx_CurrMb2[15:8];	1:mvpAx <= mvx_CurrMb2[31:24];
						default:mvpAx <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpAx <= mvx_CurrMb2[15:8];	1:mvpAx <= mvx_CurrMb3[7:0];
						default:mvpAx <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpAx <= mvx_CurrMb2[15:8];	1:mvpAx <= mvx_CurrMb3[7:0];
						2:mvpAx <= mvx_CurrMb2[31:24];	3:mvpAx <= mvx_CurrMb3[23:16];	
					endcase
				endcase
			endcase
		else
			mvpAx <= 0;
	
	//-------------
	//mvpAy
	//-------------
	always @ (Is_skipMB_mv_calc or mb_pred_state or sub_mb_pred_state 
		or mb_type_general or sub_mb_type or mbPartIdx or subMbPartIdx or compIdx 
		or mvy_mbAddrA or mvy_CurrMb0 or mvy_CurrMb1 or mvy_CurrMb2 or mvy_CurrMb3
		or refIdxL0_A or refIdxL0_B or refIdxL0_C)	
		//P_skip or Inter16x16
		if (Is_skipMB_mv_calc || (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x16 && compIdx == 1))
			mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[7:0];
		//Inter16x8
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x8 && compIdx == 1)
			begin
				if (mbPartIdx == 0)
					mvpAy <= {8{refIdxL0_B}} & mvy_mbAddrA[7:0];
				else
					mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[23:16]; 
			end 
		//Inter8x16
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter8x16 && compIdx == 1)
			begin
				if (mbPartIdx == 0)
					mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[7:0];
				else
					mvpAy <= {8{refIdxL0_C}} & mvy_CurrMb0[15:8];
			end
		//Inter8x8
		else if (sub_mb_pred_state == `sub_mvd_l0_s && compIdx == 1)	//sub_mb_pred
			case (mbPartIdx)
				0:
				case (sub_mb_type)
					0:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[7:0];
					1:	//8x4
					case (subMbPartIdx)
						0:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[7:0];
						1:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[15:8];
						default:mvpAy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[7:0]; 
						1:mvpAy <= mvy_CurrMb0[7:0];
						default:mvpAy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[7:0];
						1:mvpAy <= mvy_CurrMb0[7:0];
						2:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[15:8];
						3:mvpAy <= mvy_CurrMb0[23:16]; 
					endcase
				endcase
				1:
				case (sub_mb_type)
					0:mvpAy <= mvy_CurrMb0[15:8];
					1:	//8x4
					case (subMbPartIdx)
						0:mvpAy <= mvy_CurrMb0[15:8];	1:mvpAy <= mvy_CurrMb0[31:24];
						default:mvpAy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpAy <= mvy_CurrMb0[15:8];	1:mvpAy <= mvy_CurrMb1[7:0];
						default:mvpAy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpAy <= mvy_CurrMb0[15:8] ;	1:mvpAy <= mvy_CurrMb1[7:0];
						2:mvpAy <= mvy_CurrMb0[31:24];	3:mvpAy <= mvy_CurrMb1[23:16];	
					endcase
				endcase
				2:
				case (sub_mb_type)
					0:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[23:16];
					1:	//8x4
					case (subMbPartIdx)
						0:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[23:16];
						1:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[31:24];
						default:mvpAy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[23:16];
						1:mvpAy <= mvy_CurrMb2[7:0];
						default:mvpAy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[23:16];
						1:mvpAy <= mvy_CurrMb2[7:0];
						2:mvpAy <= {8{~refIdxL0_A}} & mvy_mbAddrA[31:24];
						3:mvpAy <= mvy_CurrMb2[23:16]; 
					endcase
				endcase
				3:
				case (sub_mb_type)
					0:mvpAy <= mvy_CurrMb2[15:8];
					1:	//8x4
					case (subMbPartIdx)
						0:mvpAy <= mvy_CurrMb2[15:8];	1:mvpAy <= mvy_CurrMb2[31:24];
						default:mvpAy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpAy <= mvy_CurrMb2[15:8];	1:mvpAy <= mvy_CurrMb3[7:0];
						default:mvpAy <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpAy <= mvy_CurrMb2[15:8];	1:mvpAy <= mvy_CurrMb3[7:0];
						2:mvpAy <= mvy_CurrMb2[31:24];	3:mvpAy <= mvy_CurrMb3[23:16];	
					endcase
				endcase
			endcase
		else
			mvpAy <= 0;
	//-------------
	//mvpBx 
	//-------------
	//if B is not available,it can be predicted from A when both B and C are not available
	always @ (Is_skipMB_mv_calc or mb_pred_state or sub_mb_pred_state or mb_type_general or sub_mb_type 
		or mb_num or mb_num_v or mbPartIdx or subMbPartIdx or compIdx or MBTypeGen_mbAddrA[1] or MBTypeGen_mbAddrB[1] 
		or mvx_mbAddrA or mvx_mbAddrB_dout or mvx_CurrMb0 or mvx_CurrMb1 or mvx_CurrMb2 or mvx_CurrMb3
		or refIdxL0_A or refIdxL0_B or refIdxL0_C)
		//P_skip or Inter16x16 
		if (Is_skipMB_mv_calc || (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x16 && compIdx == 0))
			begin
				if      (mb_num == 0)	mvpBx <= 0;
				else if (mb_num_v == 0)	mvpBx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
				else 					mvpBx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[31:24];
			end
		//Inter16x8
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x8 && compIdx == 0)
			begin
				if (mbPartIdx == 0)
					begin
						if      (mb_num == 0)	mvpBx <= 0;
						else if (mb_num_v == 0)	mvpBx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
						else 					mvpBx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[31:24];
					end
				else	//for bottom 8x8 block when mbAddrA is not available
					mvpBx <= (!refIdxL0_A)? 0:mvx_CurrMb0[23:16];
			end
		//Inter8x16:for left 8x8 block when mbAddrA is not available
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter8x16 && compIdx == 0)
			begin
				if (mbPartIdx == 0)	//left blk
					mvpBx <= (refIdxL0_A && !refIdxL0_B)? mvx_mbAddrB_dout[31:24]:0;
				else				//right blk
					case (!refIdxL0_C)
						1'b1:mvpBx <= 0;
						1'b0:
						if (mb_num_v == 0)
							mvpBx <= mvx_CurrMb0[7:0];
						else
							mvpBx <= (!refIdxL0_B)? mvx_mbAddrB_dout[15:8]:0;
					endcase
			end
		//Inter8x8
		else if (sub_mb_pred_state == `sub_mvd_l0_s && compIdx == 0)	
			case (mbPartIdx)
				0:
				case (sub_mb_type)
					0:if      (mb_num == 0)	  mvpBx <= 0;
					  else if (mb_num_v == 0) mvpBx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
					  else 					  mvpBx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[31:24];	
					1:  //8x4
					case (subMbPartIdx)
						0:if      (mb_num == 0)	  mvpBx <= 0;
					  	  else if (mb_num_v == 0) mvpBx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
					  	  else 					  mvpBx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[31:24];	
						1:mvpBx <= mvx_CurrMb0[7:0];  
						default:mvpBx <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:if      (mb_num == 0)	  mvpBx <= 0;
					  	  else if (mb_num_v == 0) mvpBx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
					  	  else 				      mvpBx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[31:24];
						1:if      (mb_num_v == 0) mvpBx <= mvx_CurrMb0[7:0];
						  else 					  mvpBx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[23:16];	
						default:mvpBx <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:if      (mb_num == 0)	  mvpBx <= 0;
					  	  else if (mb_num_v == 0) mvpBx <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvx_mbAddrA[7:0];
					  	  else 					  mvpBx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[31:24];
						1:if      (mb_num_v == 0) mvpBx <= mvx_CurrMb0[7:0];
						  else 					  mvpBx <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[23:16];
						2:mvpBx <= mvx_CurrMb0[7:0];
						3:mvpBx <= mvx_CurrMb0[15:8]; 
					endcase
				endcase
				1:
				case (sub_mb_type)
					0:mvpBx <= (mb_num_v == 0)? mvx_CurrMb0[15:8]:((MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[15:8]); 
					1:	//8x4
					case (subMbPartIdx)
						0:mvpBx <= (mb_num_v == 0)? mvx_CurrMb0[15:8]:((MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[15:8]);
						1:mvpBx <= mvx_CurrMb1[7:0];
						default:mvpBx <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpBx <= (mb_num_v == 0)? mvx_CurrMb0[15:8]:((MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[15:8]);
						1:mvpBx <= (mb_num_v == 0)? mvx_CurrMb1[7:0] :((MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[7:0]);
						default:mvpBx <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpBx <= (mb_num_v == 0)? mvx_CurrMb0[15:8]:((MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[15:8]);
						1:mvpBx <= (mb_num_v == 0)? mvx_CurrMb1[7:0] :((MBTypeGen_mbAddrB[1] == 1)? 0:mvx_mbAddrB_dout[7:0]);
						2:mvpBx <= mvx_CurrMb1[7:0];
						3:mvpBx <= mvx_CurrMb1[15:8]; 
					endcase
				endcase
				2:
				case (sub_mb_type)
					0:mvpBx <= mvx_CurrMb0[23:16]; 
					1:	//8x4
					case (subMbPartIdx)
						0:mvpBx <= mvx_CurrMb0[23:16];	1:mvpBx <= mvx_CurrMb2[7:0];	default:mvpBx <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpBx <= mvx_CurrMb0[23:16];	1:mvpBx <= mvx_CurrMb0[31:24];	default:mvpBx <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpBx <= mvx_CurrMb0[23:16];	1:mvpBx <= mvx_CurrMb0[31:24];
						2:mvpBx <= mvx_CurrMb2[7:0];	3:mvpBx <= mvx_CurrMb2[15:8]; 
					endcase
				endcase
				3:
				case (sub_mb_type)
					0:mvpBx <= mvx_CurrMb1[23:16]; 
					1:	//8x4
					case (subMbPartIdx)
						0:mvpBx <= mvx_CurrMb1[23:16];	1:mvpBx <= mvx_CurrMb3[7:0];	default:mvpBx <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:mvpBx <= mvx_CurrMb1[23:16];	1:mvpBx <= mvx_CurrMb1[31:24];	default:mvpBx <= 0;
					endcase
					3:	//4x4
					case (subMbPartIdx)
						0:mvpBx <= mvx_CurrMb1[23:16];	1:mvpBx <= mvx_CurrMb1[31:24];
						2:mvpBx <= mvx_CurrMb3[7:0];	3:mvpBx <= mvx_CurrMb3[15:8]; 
					endcase
				endcase
			endcase
		else
			mvpBx <= 0;
	//-------------
	//mvpBy 
	//-------------
	//if B is not available,it can be predicted from A when both B and C are not available
	always @ (Is_skipMB_mv_calc or mb_pred_state or sub_mb_pred_state or mb_type_general or sub_mb_type 
		or mb_num or mb_num_v or mbPartIdx or subMbPartIdx or compIdx or MBTypeGen_mbAddrA[1] or MBTypeGen_mbAddrB[1] 
		or mvy_mbAddrA or mvy_mbAddrB_dout or mvy_CurrMb0 or mvy_CurrMb1 or mvy_CurrMb2 or mvy_CurrMb3
		or refIdxL0_A or refIdxL0_B or refIdxL0_C)
		//P_skip or Inter16x16 
		if (Is_skipMB_mv_calc || (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x16 && compIdx == 1))
			begin
				if      (mb_num == 0)	mvpBy <= 0;
				else if (mb_num_v == 0)	mvpBy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
				else 					mvpBy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[31:24];
			end
		//Inter16x8
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter16x8 && compIdx == 1)
			begin
				if (mbPartIdx == 0) //upper 8x8 block
					begin
						if      (mb_num == 0)	mvpBy <= 0;
						else if (mb_num_v == 0)	mvpBy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
						else 					mvpBy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[31:24];
					end
				else	//for bottom 8x8 block when mbAddrA is not available
					mvpBy <= (!refIdxL0_A)? 0:mvy_CurrMb0[23:16];
			end
		//Inter8x16:for left 8x8 block when mbAddrA is not available
		else if (mb_pred_state == `mvd_l0_s && mb_type_general == `MB_Inter8x16 && compIdx == 1)
			begin
				if (mbPartIdx == 0)	//left blk
					mvpBy <= (refIdxL0_A && !refIdxL0_B)? mvy_mbAddrB_dout[31:24]:0;
				else				//right blk
					case (!refIdxL0_C)
						1'b1:mvpBy <= 0;
						1'b0:
						if (mb_num_v == 0)
							mvpBy <= mvy_CurrMb0[7:0];
						else
							mvpBy <= (!refIdxL0_B)? mvy_mbAddrB_dout[15:8]:0;
					endcase
			end
		//Inter8x8
		else if (sub_mb_pred_state == `sub_mvd_l0_s && compIdx == 1)	
			case (mbPartIdx)
				0:
				case (sub_mb_type)
					0:if      (mb_num == 0)		mvpBy <= 0;
					  else if (mb_num_v == 0) 	mvpBy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
					  else 						mvpBy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[31:24];	
					1:  //8x4
					case (subMbPartIdx)
						0:if      (mb_num == 0)		mvpBy <= 0;
					  	  else if (mb_num_v == 0) 	mvpBy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
					  	  else 						mvpBy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[31:24];	
						1:mvpBy <= mvy_CurrMb0[7:0];  
						default:mvpBy <= 0;
					endcase
					2:	//4x8
					case (subMbPartIdx)
						0:if      (mb_num == 0)		mvpBy <= 0;
					  	  else if (mb_num_v == 0) 	mvpBy <= (MBTypeGen_mbAddrA[1] == 1)? 0:mvy_mbAddrA[7:0];
					  	  else 						mvpBy <= (MBTypeGen_mbAddrB[1] == 1)? 0:mvy_mbAddrB_dout[31:24];
						1:if      (mb_num_v == 0) 	mvpBy <= mvy_CurrMb0[7:0];