syswindml.h

windriver_VxWorks.zinc60t22 zin6.0 for tornado 2.2 patch

/* sysWindML.h - WindML BSP specific routines  */

/* Copyright 2001-2003 Wind River Systems, Inc. */

#ifndef WINDML_NATIVE
#include "copyright_wrs.h"
#endif

/*
modification history
--------------------
01e,18jun03,jlb  Upgrade to Tornado 2.2 version (WindML 3.0)
01d,14oct01,jlb  Add Epson PCI devices
01c,18oct01,jlb  Obtain PCI memory base from BSP (SPR 69996)
01b,14jun01,rfm  Fixed compile error
01a,01may01,jlb  written

*/

#ifndef __INCsysWindMLh
#define __INCsysWindMLh

#ifdef __cplusplus
extern "C" {
#endif

/************************************************************************************
*
*  Following definitions are used by the WindML BSP API.
*
*************************************************************************************/

/* WindML device information data structure.  This data structure, defined/allocated
 * by the BSP, is used to provide the WindML drivers with information on how to
 * access the devices present on the target board.  The same data structure is used
 * for all WindML devices (graphics, video, audio, keyboard, pointer, touchscreen,
 * etc.).
 */
typedef struct windml_device
{
    unsigned int vendorID;               /* vendor ID */
    unsigned int deviceID;               /* device ID */
    unsigned int instance;               /* instance of device */
    unsigned int devType;                /* type of input device */
    unsigned int busType;                /* type of bus */
    unsigned int regDelta;               /* distance between adjacent registers */
    unsigned int intLevel;               /* interrupt level to be used */
    void         (** intVector) ();       /* interrupt vector */
    void         * pPhysBaseAdrs0;       /* first base address */
    void         * pPhysBaseAdrs1;       /* second base address */
    void         * pPhysBaseAdrs2;       /* third base address */
    void         * pPhysBaseAdrs3;       /* fourth base address */
    void         * pPhysBaseAdrs4;       /* fifth base address */
    void         * pPhysBaseAdrs5;       /* sixth base address */
    void         * pRegBase;             /* base address of legacy register space */
} WINDML_DEVICE;

/* Device access ports */

#define WINDML_DEVICE_BASE_ADRS_0           0
#define WINDML_DEVICE_BASE_ADRS_1           1
#define WINDML_DEVICE_BASE_ADRS_2           2
#define WINDML_DEVICE_BASE_ADRS_3           3
#define WINDML_DEVICE_BASE_ADRS_4           4
#define WINDML_DEVICE_BASE_ADRS_5           5

/* Device types supported by WindML */
#define WINDML_GRAPHICS_DEVICE              1
#define WINDML_KEYBOARD_DEVICE              2
#define WINDML_POINTER_DEVICE               3
#define WINDML_TOUCHSCREEN_DEVICE           4
#define WINDML_AUDIO_DEVICE                 5
#define WINDML_FRAME_GRABBER                6
#define WINDML_MPEG_DECODER                 7
#define WINDML_JPEG_DECODER                 8


/* Device control function codes, these functions are used to control various
 * operations that must be present within the BSP since the BSP has control of
 * the required resource.
 */
#define WINDML_ACCESS_MODE_SET              10
#define WINDML_LCD_MODE_SET                 11
#define WINDML_BUSWIDTH_SET                 12
#define WINDML_PCI_MEMBASE_GET              13

/* Amplifying information for the WINDML_ACCESS_MODE_SET function */
#define WINDML_IO_ENABLE            0x00000001
#define WINDML_MEM_ENABLE           0x00000002

/* Amplifying information for the LCD mode set function */
#define WINDML_LCD_ON               0x00000020
#define WINDML_LCD_OFF              0x00000021
#define WINDML_BACKLIGHT_ON         0x00000022
#define WINDML_BACKLIGHT_OFF        0x00000023


/* Vendor Identifiers in general are the same as PCI vendor IDs, non-PCI
 * type vendors are mapped into the PCI vendor space
 */

/* Vendor IDs */

/* Non-PCI type devices */
#define VENDOR_INTEGRAL_LCD             0x00010001
#define VENDOR_GENERIC_VGA              0x00010002

/* PCI type devices */
#define VENDOR_PCI_ATI                  0x1002
#define VENDOR_PCI_TSENG                0x100C
#define VENDOR_PCI_WEITEK               0x100E
#define VENDOR_PCI_VIDEOLOGIC           0x1010
#define VENDOR_PCI_CIRRUS               0x1013
#define VENDOR_PCI_TRIDENT              0x1023
#define VENDOR_PCI_ALI                  0x1025
#define VENDOR_PCI_MATROX               0x102B
#define VENDOR_PCI_CHIPSTECH            0x102C
#define VENDOR_PCI_SIS                  0x1039
#define VENDOR_PCI_CYRIX                0x1078
#define VENDOR_PCI_TVIA                 0x10EA
#define VENDOR_PCI_EPSON                0x10f4
#define VENDOR_PCI_3DFX                 0x121A
#define VENDOR_PCI_3DLABS               0x3D3D
#define VENDOR_PCI_CREATIVE             0x4942
#define VENDOR_PCI_S3                   0x5333
#define VENDOR_PCI_INTEL                0x8086

/* Device Identifiers are in general the same as the PCI device IDs, non-PCI
 * type devices are mapped into the PCI device space
 */

/* Non PCI Device IDs */
#define DEVICE_VGA                      0x0000
#define DEVICE_LCD_CONTROLLER_1         0x0001
#define DEVICE_LCD_CONTROLLER_2         0x0002
#define DEVICE_LCD_CONTROLLER_3         0x0003
#define DEVICE_LCD_CONTROLLER_4         0x0004


/* ATI */
#define DEVICE_ID_ATI_MACH32            0x4158
#define DEVICE_ID_ATI_MACH64CT          0x4354
#define DEVICE_ID_ATI_MACH64CX          0x4358
#define DEVICE_ID_ATI_MACH64ET          0x4554
#define DEVICE_ID_ATI_MACH64GB          0x4742
#define DEVICE_ID_ATI_MACH64GD          0x4744
#define DEVICE_ID_ATI_MACH64GI          0x4749
#define DEVICE_ID_ATI_MACH64GL          0x474C
#define DEVICE_ID_ATI_MACH64GM          0x474D
#define DEVICE_ID_ATI_MACH64GN          0x474E
#define DEVICE_ID_ATI_MACH64GO          0x474F
#define DEVICE_ID_ATI_MACH64GP          0x4750
#define DEVICE_ID_ATI_MACH64GQ          0x4751
#define DEVICE_ID_ATI_MACH64GR          0x4752
#define DEVICE_ID_ATI_MACH64GS          0x4753
#define DEVICE_ID_ATI_MACH64GT          0x4754
#define DEVICE_ID_ATI_MACH64GU          0x4755
#define DEVICE_ID_ATI_MACH64GV          0x4756
#define DEVICE_ID_ATI_MACH64GW          0x4757
#define DEVICE_ID_ATI_MACH64GX          0x4758
#define DEVICE_ID_ATI_MACH64GZ          0x475A
#define DEVICE_ID_ATI_MACH64LB          0x4C42
#define DEVICE_ID_ATI_MACH64LD          0x4C44
#define DEVICE_ID_ATI_RAGE128LE         0x4C45
#define DEVICE_ID_ATI_RAGE128LF         0x4C46
#define DEVICE_ID_ATI_MACH64LG          0x4C47
#define DEVICE_ID_ATI_MACH64LI          0x4C49
#define DEVICE_ID_ATI_MACH64LM          0x4C4D
#define DEVICE_ID_ATI_MACH64LN          0x4C4E
#define DEVICE_ID_ATI_MACH64LP          0x4C50
#define DEVICE_ID_ATI_MACH64LR          0x4C52
#define DEVICE_ID_ATI_MACH64LS          0x4C53
#define DEVICE_ID_ATI_RAGE128MF         0x4D46
#define DEVICE_ID_ATI_RAGE128ML         0x4D4C
#define DEVICE_ID_ATI_RAGE128PF         0x5046
#define DEVICE_ID_ATI_RAGE128PR         0x5052
#define DEVICE_ID_ATI_RADEON_QD         0x5144
#define DEVICE_ID_ATI_RADEON_QE         0x5145
#define DEVICE_ID_ATI_RADEON_QF         0x5146
#define DEVICE_ID_ATI_RADEON_QG         0x5147
#define DEVICE_ID_ATI_RAGE128RE         0x5245
#define DEVICE_ID_ATI_RAGE128RF         0x5246
#define DEVICE_ID_ATI_RAGE128RG         0x5247
#define DEVICE_ID_ATI_RAGE128RK         0x524B
#define DEVICE_ID_ATI_RAGE128RL         0x524C
#define DEVICE_ID_ATI_MACH64VT          0x5654
#define DEVICE_ID_ATI_MACH64VU          0x5655
#define DEVICE_ID_ATI_MACH64VV          0x5656

/* Cirrus Logic */
#define DEVICE_ID_CIRRUS_GD7548         0x0038
#define DEVICE_ID_CIRRUS_GD7555         0x0040
#define DEVICE_ID_CIRRUS_GD5430         0x00A0
#define DEVICE_ID_CIRRUS_GD5434_4       0x00A4
#define DEVICE_ID_CIRRUS_GD5434_8       0x00A8
#define DEVICE_ID_CIRRUS_GD5436         0x00AC
#define DEVICE_ID_CIRRUS_GD5446         0x00B8
#define DEVICE_ID_CIRRUS_GD5480         0x00BC
#define DEVICE_ID_CIRRUS_GD5462         0x00D0
#define DEVICE_ID_CIRRUS_GD5464         0x00D4
#define DEVICE_ID_CIRRUS_GD5464BD       0x00D5
#define DEVICE_ID_CIRRUS_GD5465         0x00D6
#define DEVICE_ID_CIRRUS_6729           0x1100
#define DEVICE_ID_CIRRUS_6832           0x1110
#define DEVICE_ID_CIRRUS_GD7542         0x1200
#define DEVICE_ID_CIRRUS_GD7543         0x1202
#define DEVICE_ID_CIRRUS_GD7541         0x1204

/* Chips & Tech */
#define DEVICE_ID_CHIPS_65545           0x00D8
#define DEVICE_ID_CHIPS_65548           0x00DC
#define DEVICE_ID_CHIPS_65550           0x00E0
#define DEVICE_ID_CHIPS_65554           0x00E4
#define DEVICE_ID_CHIPS_65555           0x00E5
#define DEVICE_ID_CHIPS_68554           0x00F4
#define DEVICE_ID_CHIPS_69000           0x00C0
#define DEVICE_ID_CHIPS_69030           0x0C30


/* Cyrix */
#define DEVICE_ID_CYRIX_5530            0x0104

/* Epson */
#define  DEVICE_ID_EPSON_13XXX          0x1300

/* Intel */
#define DEVICE_ID_INTEL_82815           0x1102
#define DEVICE_ID_INTEL_82815_FASTFSB   0x1132

/* Matrox */
#define DEVICE_ID_MATROX_MGA2085        0x0518
#define DEVICE_ID_MATROX_MGA2064        0x0519
#define DEVICE_ID_MATROX_MGA1064        0x051a
#define DEVICE_ID_MATROX_MGA2164        0x051b
#define DEVICE_ID_MATROX_MGA2164_AGP    0x051f
#define DEVICE_ID_MATROX_MGAG200_PCI    0x0520
#define DEVICE_ID_MATROX_MGAG200        0x0521
#define DEVICE_ID_MATROX_MGAG400        0x0525
#define DEVICE_ID_MATROX_IMPRESSION     0x0D10
#define DEVICE_ID_MATROX_MGAG100_PCI    0x1000
#define DEVICE_ID_MATROX_MGAG100        0x1001

#define DEVICE_ID_MATROX_MILL_G200_SD   0xff00
#define DEVICE_ID_MATROX_PROD_G100_SD   0xff01
#define DEVICE_ID_MATROX_MYST_G200_SD   0xff02
#define DEVICE_ID_MATROX_MILL_G200_SG   0xff03
#define DEVICE_ID_MATROX_MARV_G200_SD   0xff04


/* S3 */
#define DEVICE_ID_S3_PLATO              0x0551
#define DEVICE_ID_S3_VIRGE              0x5631
#define DEVICE_ID_S3_TRIO               0x8811
#define DEVICE_ID_S3_AURORA64VP         0x8812
#define DEVICE_ID_S3_TRIO64UVP          0x8814
#define DEVICE_ID_S3_VIRGE_VX           0x883D
#define DEVICE_ID_S3_868                0x8880
#define DEVICE_ID_S3_928                0x88B0
#define DEVICE_ID_S3_864_0              0x88C0
#define DEVICE_ID_S3_864_1              0x88C1
#define DEVICE_ID_S3_964_0              0x88D0
#define DEVICE_ID_S3_964_1              0x88D1
#define DEVICE_ID_S3_968                0x88F0
#define DEVICE_ID_S3_TRIO64V2_DXGX      0x8901
#define DEVICE_ID_S3_PLATO_PX           0x8902
#define DEVICE_ID_S3_Trio3D             0x8904
#define DEVICE_ID_S3_Trio3D_2X          0x8A13
#define DEVICE_ID_S3_VIRGE_DXGX         0x8A01
#define DEVICE_ID_S3_VIRGE_GX2          0x8A10
#define DEVICE_ID_S3_SAVAGE3D           0x8A20
#define DEVICE_ID_S3_SAVAGE3D_MV        0x8A21
#define DEVICE_ID_S3_SAVAGE4            0x8A22
#define DEVICE_ID_S3_SAVAGE2000         0x9102
#define DEVICE_ID_S3_VIRGE_MX           0x8C01
#define DEVICE_ID_S3_VIRGE_MXPLUS       0x8C01
#define DEVICE_ID_S3_VIRGE_MXP          0x8C03
#define DEVICE_ID_S3_PROSAVAGE_PM       0x8A25
#define DEVICE_ID_S3_PROSAVAGE_KM       0x8A26
#define DEVICE_ID_S3_SAVAGE_MX_MV       0x8c10
#define DEVICE_ID_S3_SAVAGE_MX          0x8c11
#define DEVICE_ID_S3_SAVAGE_IX_V        0x8c12
#define DEVICE_ID_S3_SAVAGE_IX          0x8c13

/* Trident */
#define DEVICE_ID_TRIDENT_8400          0x8400
#define DEVICE_ID_TRIDENT_8420          0x8420
#define DEVICE_ID_TRIDENT_8500          0x8500
#define DEVICE_ID_TRIDENT_8520          0x8520
#define DEVICE_ID_TRIDENT_8600          0x8600
#define DEVICE_ID_TRIDENT_8620          0x8620
#define DEVICE_ID_TRIDENT_9320          0x9320
#define DEVICE_ID_TRIDENT_9388          0x9388
#define DEVICE_ID_TRIDENT_9397          0x9397
#define DEVICE_ID_TRIDENT_939A          0x939A
#define DEVICE_ID_TRIDENT_9420          0x9420
#define DEVICE_ID_TRIDENT_9440          0x9440
#define DEVICE_ID_TRIDENT_9520          0x9520
#define DEVICE_ID_TRIDENT_9525          0x9525
#define DEVICE_ID_TRIDENT_9540          0x9540
#define DEVICE_ID_TRIDENT_9660          0x9660
#define DEVICE_ID_TRIDENT_9750          0x9750
#define DEVICE_ID_TRIDENT_9850          0x9850
#define DEVICE_ID_TRIDENT_9880          0x9880

/* Tseng */
#define DEVICE_ID_TSENG_ET4000_W32P_A   0x3202
#define DEVICE_ID_TSENG_ET4000_W32P_B   0x3205
#define DEVICE_ID_TSENG_ET4000_W32P_D   0x3206
#define DEVICE_ID_TSENG_ET4000_W32P_C   0x3207
#define DEVICE_ID_TSENG_ET6000          0x3208
#define DEVICE_ID_TSENG_ET6300          0x4702

/* Tvia */
#define DEVICE_ID_TVIA_5050             0x5000
#define DEVICE_ID_TVIA_5050_AUDIO       0x5050
#define DEVICE_ID_TVIA_5300_AUDIO       0x5350

/* Weitek */
#define DEVICE_ID_WEITEK_P9000          0x9001
#define DEVICE_ID_WEITEK_P9100          0x9100


/* WindML BSP API */
WINDML_DEVICE * sysWindMLDevGet (unsigned int devType, unsigned int instance,
                                 unsigned int vendorID, unsigned int deviceID );

int sysWindMLDevCreate (void);

int sysWindMLDevCtrl ( WINDML_DEVICE *pDev, int function, int *pArg );

int sysWindMLDevRelease (WINDML_DEVICE *pDev );

int sysWindMLIntConnect (WINDML_DEVICE *pDev, void (* routine) (),
                            int parameter );

int sysWindMLIntEnable (WINDML_DEVICE *pDev );

int sysWindMLIntDisable (WINDML_DEVICE *pDev );


#ifdef __cplusplus
}
#endif

#endif