cp.vams

phase frequency detector verilog

// Charge Pump
//
// Version 1a, 1 June 04
//
// Olaf Zinke
//
// Downloaded from The Designer's Guide Community (www.designers-guide.org).
// Post any questions on www.designers-guide.org/Forum.
// Taken from "The Designer's Guide to Verilog-AMS" by Kundert & Zinke.
// Appendix A, Listing 6.

`include "disciplines.vams"
`timescale 10ps / 1ps

module cp (pout, nout, inc, dec);
    parameter real cur = 1m;	// output current (A)
    input inc, dec; 
    electrical pout, nout;
    real out;

    analog begin
	@(initial_step) out = 0.0;

	if (dec && !inc)
	    out = -cur;
	else if (!dec && inc)
	    out = cur;
	else out = 0;

	I(pout, nout) <+ -transition(out, 0.0, 10n, 10n);
    end
endmodule