📄 stm32f10x_nvic.s79
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// 249 u32 NVIC_GetBASEPRI(void)
// 250 {
// 251 return (__GetBASEPRI());
NVIC_GetBASEPRI:
_BF.W __GetBASEPRI,??__GetBASEPRI??rT
CFI EndBlock cfiBlock10
// 252 }
// 253
// 254 /*******************************************************************************
// 255 * Function Name : NVIC_GetCurrentPendingIRQChannel
// 256 * Description : Returns the current pending IRQ channel identifier.
// 257 * Input : None
// 258 * Output : None
// 259 * Return : Pending IRQ Channel Identifier.
// 260 *******************************************************************************/
RSEG CODE:CODE:NOROOT(2)
CFI Block cfiBlock11 Using cfiCommon0
CFI Function NVIC_GetCurrentPendingIRQChannel
THUMB
// 261 u16 NVIC_GetCurrentPendingIRQChannel(void)
// 262 {
// 263 return ((u16)((SCB->ICSR & (u32)0x003FF000) >> 0x0C));
NVIC_GetCurrentPendingIRQChannel:
LDR.N R0,??DataTable30 ;; 0xffffffffe000ed04
LDR.N R1,??NVIC_GetCurrentPendingIRQChannel_0 ;; 0x3ff000
LDR R0,[R0, #+0]
ANDS R1,R1,R0
LSRS R0,R1,#+12
BX LR ;; return
DATA
??NVIC_GetCurrentPendingIRQChannel_0:
DC32 0x3ff000
CFI EndBlock cfiBlock11
// 264 }
// 265
// 266 /*******************************************************************************
// 267 * Function Name : NVIC_GetIRQChannelPendingBitStatus
// 268 * Description : Checks whether the specified IRQ Channel pending bit is set
// 269 * or not.
// 270 * Input : - NVIC_IRQChannel: specifies the interrupt pending bit to check.
// 271 * Output : None
// 272 * Return : The new state of IRQ Channel pending bit(SET or RESET).
// 273 *******************************************************************************/
RSEG CODE:CODE:NOROOT(2)
CFI Block cfiBlock12 Using cfiCommon0
CFI Function NVIC_GetIRQChannelPendingBitStatus
THUMB
// 274 ITStatus NVIC_GetIRQChannelPendingBitStatus(u8 NVIC_IRQChannel)
// 275 {
// 276 ITStatus pendingirqstatus = RESET;
// 277 u32 tmp = 0x00;
// 278
// 279 /* Check the parameters */
// 280 assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_IRQChannel));
// 281
// 282 tmp = ((u32)0x01 << (NVIC_IRQChannel & (u32)0x1F));
NVIC_GetIRQChannelPendingBitStatus:
MOVS R1,#+1
LSLS R2,R0,#+27
LSRS R2,R2,#+27
LSLS R1,R1,R2
// 283
// 284 if (((NVIC->ISPR[(NVIC_IRQChannel >> 0x05)]) & tmp) == tmp)
LDR.N R2,??NVIC_GetIRQChannelPendingBitStatus_0 ;; 0xffffffffe000e200
ASRS R0,R0,#+5
LDR R0,[R2, R0, LSL #+2]
ANDS R0,R0,R1
CMP R0,R1
ITT EQ
// 285 {
// 286 pendingirqstatus = SET;
MOVEQ R0,#+1
BXEQ LR
// 287 }
// 288 else
// 289 {
// 290 pendingirqstatus = RESET;
MOVS R0,#+0
// 291 }
// 292 return pendingirqstatus;
BX LR ;; return
Nop
DATA
??NVIC_GetIRQChannelPendingBitStatus_0:
DC32 0xffffffffe000e200
CFI EndBlock cfiBlock12
// 293 }
// 294
// 295 /*******************************************************************************
// 296 * Function Name : NVIC_SetIRQChannelPendingBit
// 297 * Description : Sets the NVIC抯 interrupt pending bit.
// 298 * Input : - NVIC_IRQChannel: specifies the interrupt pending bit to Set.
// 299 * Output : None
// 300 * Return : None
// 301 *******************************************************************************/
RSEG CODE:CODE:NOROOT(2)
CFI Block cfiBlock13 Using cfiCommon0
CFI Function NVIC_SetIRQChannelPendingBit
THUMB
// 302 void NVIC_SetIRQChannelPendingBit(u8 NVIC_IRQChannel)
// 303 {
// 304 /* Check the parameters */
// 305 assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_IRQChannel));
// 306
// 307 *(vu32*) 0xE000EF00 = (u32)NVIC_IRQChannel;
NVIC_SetIRQChannelPendingBit:
LDR.N R1,??NVIC_SetIRQChannelPendingBit_0 ;; 0xffffffffe000ef00
STR R0,[R1, #+0]
// 308 }
BX LR ;; return
Nop
DATA
??NVIC_SetIRQChannelPendingBit_0:
DC32 0xffffffffe000ef00
CFI EndBlock cfiBlock13
// 309
// 310 /*******************************************************************************
// 311 * Function Name : NVIC_ClearIRQChannelPendingBit
// 312 * Description : Clears the NVIC抯 interrupt pending bit.
// 313 * Input : - NVIC_IRQChannel: specifies the interrupt pending bit to clear.
// 314 * Output : None
// 315 * Return : None
// 316 *******************************************************************************/
RSEG CODE:CODE:NOROOT(2)
CFI Block cfiBlock14 Using cfiCommon0
CFI Function NVIC_ClearIRQChannelPendingBit
THUMB
// 317 void NVIC_ClearIRQChannelPendingBit(u8 NVIC_IRQChannel)
// 318 {
// 319 /* Check the parameters */
// 320 assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_IRQChannel));
// 321
// 322 NVIC->ICPR[(NVIC_IRQChannel >> 0x05)] = (u32)0x01 << (NVIC_IRQChannel & (u32)0x1F);
NVIC_ClearIRQChannelPendingBit:
LDR.N R2,??DataTable19 ;; 0xffffffffe000e280
ASRS R1,R0,#+5
MOVS R3,#+1
LSLS R0,R0,#+27
LSRS R0,R0,#+27
LSLS R3,R3,R0
STR R3,[R2, R1, LSL #+2]
// 323 }
BX LR ;; return
CFI EndBlock cfiBlock14
RSEG CODE:CODE:NOROOT(2)
DATA
??DataTable19:
DC32 0xffffffffe000e280
// 324
// 325 /*******************************************************************************
// 326 * Function Name : NVIC_GetCurrentActiveHandler
// 327 * Description : Returns the current active Handler (IRQ Channel and
// 328 * SystemHandler) identifier.
// 329 * Input : None
// 330 * Output : None
// 331 * Return : Active Handler Identifier.
// 332 *******************************************************************************/
RSEG CODE:CODE:NOROOT(2)
CFI Block cfiBlock15 Using cfiCommon0
CFI Function NVIC_GetCurrentActiveHandler
THUMB
// 333 u16 NVIC_GetCurrentActiveHandler(void)
// 334 {
// 335 return ((u16)(SCB->ICSR & (u32)0x3FF));
NVIC_GetCurrentActiveHandler:
LDR.N R0,??DataTable30 ;; 0xffffffffe000ed04
LDR R0,[R0, #+0]
LSLS R0,R0,#+22
LSRS R0,R0,#+22
BX LR ;; return
CFI EndBlock cfiBlock15
// 336 }
// 337
// 338 /*******************************************************************************
// 339 * Function Name : NVIC_GetIRQChannelActiveBitStatus
// 340 * Description : Checks whether the specified IRQ Channel active bit is set
// 341 * or not.
// 342 * Input : - NVIC_IRQChannel: specifies the interrupt active bit to check.
// 343 * Output : None
// 344 * Return : The new state of IRQ Channel active bit(SET or RESET).
// 345 *******************************************************************************/
RSEG CODE:CODE:NOROOT(2)
CFI Block cfiBlock16 Using cfiCommon0
CFI Function NVIC_GetIRQChannelActiveBitStatus
THUMB
// 346 ITStatus NVIC_GetIRQChannelActiveBitStatus(u8 NVIC_IRQChannel)
// 347 {
// 348 ITStatus activeirqstatus = RESET;
// 349 u32 tmp = 0x00;
// 350
// 351 /* Check the parameters */
// 352 assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_IRQChannel));
// 353
// 354 tmp = ((u32)0x01 << (NVIC_IRQChannel & (u32)0x1F));
NVIC_GetIRQChannelActiveBitStatus:
MOVS R1,#+1
LSLS R2,R0,#+27
LSRS R2,R2,#+27
LSLS R1,R1,R2
// 355
// 356 if (((NVIC->IABR[(NVIC_IRQChannel >> 0x05)]) & tmp) == tmp )
LDR.N R2,??NVIC_GetIRQChannelActiveBitStatus_0 ;; 0xffffffffe000e300
ASRS R0,R0,#+5
LDR R0,[R2, R0, LSL #+2]
ANDS R0,R0,R1
CMP R0,R1
ITT EQ
// 357 {
// 358 activeirqstatus = SET;
MOVEQ R0,#+1
BXEQ LR
// 359 }
// 360 else
// 361 {
// 362 activeirqstatus = RESET;
MOVS R0,#+0
// 363 }
// 364 return activeirqstatus;
BX LR ;; return
Nop
DATA
??NVIC_GetIRQChannelActiveBitStatus_0:
DC32 0xffffffffe000e300
CFI EndBlock cfiBlock16
// 365 }
// 366
// 367 /*******************************************************************************
// 368 * Function Name : NVIC_GetCPUID
// 369 * Description : Returns the ID number, the version number and the implementation
// 370 * details of the Cortex-M3 core.
// 371 * Input : None
// 372 * Output : None
// 373 * Return : CPU ID.
// 374 *******************************************************************************/
RSEG CODE:CODE:NOROOT(2)
CFI Block cfiBlock17 Using cfiCommon0
CFI Function NVIC_GetCPUID
THUMB
// 375 u32 NVIC_GetCPUID(void)
// 376 {
// 377 return (SCB->CPUID);
NVIC_GetCPUID:
LDR.N R0,??NVIC_GetCPUID_0 ;; 0xffffffffe000ed00
LDR R0,[R0, #+0]
BX LR ;; return
Nop
DATA
??NVIC_GetCPUID_0:
DC32 0xffffffffe000ed00
CFI EndBlock cfiBlock17
// 378 }
// 379
// 380 /*******************************************************************************
// 381 * Function Name : NVIC_SetVectorTable
// 382 * Description : Sets the vector table location and Offset.
// 383 * Input : - NVIC_VectTab: specifies if the vector table is in RAM or
// 384 * FLASH memory.
// 385 * This parameter can be one of the following values:
// 386 * - NVIC_VectTab_RAM
// 387 * - NVIC_VectTab_FLASH
// 388 * - Offset: Vector Table base offset field.
// 389 * This value must be a multiple of 0x100.
// 390 * Output : None
// 391 * Return : None
// 392 *******************************************************************************/
RSEG CODE:CODE:NOROOT(2)
CFI Block cfiBlock18 Using cfiCommon0
CFI Function NVIC_SetVectorTable
THUMB
// 393 void NVIC_SetVectorTable(u32 NVIC_VectTab, u32 Offset)
// 394 {
// 395 /* Check the parameters */
// 396 assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
// 397 assert_param(IS_NVIC_OFFSET(Offset));
// 398
// 399 SCB->VTOR = NVIC_VectTab | (Offset & (u32)0x1FFFFF80);
NVIC_SetVectorTable:
LDR.N R2,??DataTable21 ;; 0xffffffffe000ed08
LDR.N R3,??NVIC_SetVectorTable_0 ;; 0x1fffff80
ANDS R3,R3,R1
ORRS R3,R3,R0
STR R3,[R2, #+0]
// 400 }
BX LR ;; return
DATA
??NVIC_SetVectorTable_0:
DC32 0x1fffff80
CFI EndBlock cfiBlock18
RSEG CODE:CODE:NOROOT(2)
DATA
??DataTable21:
DC32 0xffffffffe000ed08
// 401
// 402 /*******************************************************************************
// 403 * Function Name : NVIC_GenerateSystemReset
// 404 * Description : Generates a system reset.
// 405 * Input : None
// 406 * Output : None
// 407 * Return : None
// 408 *******************************************************************************/
RSEG CODE:CODE:NOROOT(2)
CFI Block cfiBlock19 Using cfiCommon0
CFI Function NVIC_GenerateSystemReset
THUMB
// 409 void NVIC_GenerateSystemReset(void)
// 410 {
// 411 SCB->AIRCR = AIRCR_VECTKEY_MASK | (u32)0x04;
NVIC_GenerateSystemReset:
LDR.N R0,??DataTable26 ;; 0xffffffffe000ed0c
LDR.N R1,??NVIC_GenerateSystemReset_0 ;; 0x5fa0004
STR R1,[R0, #+0]
// 412 }
BX LR ;; return
DATA
??NVIC_GenerateSystemReset_0:
DC32 0x5fa0004
CFI EndBlock cfiBlock19
// 413
// 414 /*******************************************************************************
// 415 * Function Name : NVIC_GenerateCoreReset
// 416 * Description : Generates a Core (Core + NVIC) reset.
// 417 * Input : None
// 418 * Output : None
// 419 * Return : None
// 420 *******************************************************************************/
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