stm32f10x_vector.s79

用于监视I2C通信总线

//   13 *                      After Reset the Cortex-M3 processor is in Thread mode,
//   14 *                      priority is Privileged, and the Stack is set to Main.
//   15 ********************************************************************************
//   16 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
//   17 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
//   18 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
//   19 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
//   20 * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
//   21 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
//   22 *******************************************************************************/
//   23 
//   24 /* Includes ------------------------------------------------------------------*/
//   25 #include "stm32f10x_lib.h"
//   26 #include "stm32f10x_it.h"
//   27 
//   28 /* Private typedef -----------------------------------------------------------*/
//   29 typedef void( *intfunc )( void );
//   30 typedef union { intfunc __fun; void * __ptr; } intvec_elem;
//   31 
//   32 /* Private define ------------------------------------------------------------*/
//   33 /* Uncomment the following line if you need to use external SRAM mounted on
//   34    STM3210E-EVAL board as data memory */
//   35 
//   36 /* #define DATA_IN_ExtSRAM */
//   37 
//   38 /* Private macro -------------------------------------------------------------*/
//   39 /* Private variables ---------------------------------------------------------*/
//   40 /* Private function prototypes -----------------------------------------------*/
//   41 /* Private functions ---------------------------------------------------------*/
//   42 
//   43 
//   44 #pragma language=extended
//   45 #pragma segment="CSTACK"
//   46 
//   47 void __program_start( void );
//   48 
//   49 #pragma location = "INTVEC"
//   50 /* STM32F10x Vector Table entries */

        RSEG INTVEC:CONST:SORT:NOROOT(2)
//   51 const intvec_elem __vector_table[] =
__vector_table:
        DATA
        DC32 SFE(CSTACK), __program_start, NMIException, HardFaultException
        DC32 MemManageException, BusFaultException, UsageFaultException, 0H, 0H
        DC32 0H, 0H, SVCHandler, DebugMonitor, 0H, PendSVC, SysTickHandler
        DC32 WWDG_IRQHandler, PVD_IRQHandler, TAMPER_IRQHandler, RTC_IRQHandler
        DC32 FLASH_IRQHandler, RCC_IRQHandler, EXTI0_IRQHandler
        DC32 EXTI1_IRQHandler, EXTI2_IRQHandler, EXTI3_IRQHandler
        DC32 EXTI4_IRQHandler, DMA1_Channel1_IRQHandler
        DC32 DMA1_Channel2_IRQHandler, DMA1_Channel3_IRQHandler
        DC32 DMA1_Channel4_IRQHandler, DMA1_Channel5_IRQHandler
        DC32 DMA1_Channel6_IRQHandler, DMA1_Channel7_IRQHandler
        DC32 ADC1_2_IRQHandler, USB_HP_CAN_TX_IRQHandler
        DC32 USB_LP_CAN_RX0_IRQHandler, CAN_RX1_IRQHandler, CAN_SCE_IRQHandler
        DC32 EXTI9_5_IRQHandler, TIM1_BRK_IRQHandler, TIM1_UP_IRQHandler
        DC32 TIM1_TRG_COM_IRQHandler, TIM1_CC_IRQHandler, TIM2_IRQHandler
        DC32 TIM3_IRQHandler, TIM4_IRQHandler, I2C1_EV_IRQHandler
        DC32 I2C1_ER_IRQHandler, I2C2_EV_IRQHandler, I2C2_ER_IRQHandler
        DC32 SPI1_IRQHandler, SPI2_IRQHandler, USART1_IRQHandler
        DC32 USART2_IRQHandler, USART3_IRQHandler, EXTI15_10_IRQHandler
        DC32 RTCAlarm_IRQHandler, USBWakeUp_IRQHandler, TIM8_BRK_IRQHandler
        DC32 TIM8_UP_IRQHandler, TIM8_TRG_COM_IRQHandler, TIM8_CC_IRQHandler
        DC32 ADC3_IRQHandler, FSMC_IRQHandler, SDIO_IRQHandler, TIM5_IRQHandler
        DC32 SPI3_IRQHandler, UART4_IRQHandler, UART5_IRQHandler
        DC32 TIM6_IRQHandler, TIM7_IRQHandler, DMA2_Channel1_IRQHandler
        DC32 DMA2_Channel2_IRQHandler, DMA2_Channel3_IRQHandler
        DC32 DMA2_Channel4_5_IRQHandler

        END
//   52 {
//   53   { .__ptr = __sfe( "CSTACK" ) },
//   54   __program_start,
//   55   NMIException,
//   56   HardFaultException,
//   57   MemManageException,
//   58   BusFaultException,
//   59   UsageFaultException,
//   60   0, 0, 0, 0,            /* Reserved */ 
//   61   SVCHandler,
//   62   DebugMonitor,
//   63   0,                      /* Reserved */
//   64   PendSVC,
//   65   SysTickHandler,
//   66   WWDG_IRQHandler,
//   67   PVD_IRQHandler,
//   68   TAMPER_IRQHandler,
//   69   RTC_IRQHandler,
//   70   FLASH_IRQHandler,
//   71   RCC_IRQHandler,
//   72   EXTI0_IRQHandler,
//   73   EXTI1_IRQHandler,
//   74   EXTI2_IRQHandler,
//   75   EXTI3_IRQHandler,
//   76   EXTI4_IRQHandler,
//   77   DMA1_Channel1_IRQHandler,
//   78   DMA1_Channel2_IRQHandler,
//   79   DMA1_Channel3_IRQHandler,
//   80   DMA1_Channel4_IRQHandler,
//   81   DMA1_Channel5_IRQHandler,
//   82   DMA1_Channel6_IRQHandler,
//   83   DMA1_Channel7_IRQHandler,
//   84   ADC1_2_IRQHandler,
//   85   USB_HP_CAN_TX_IRQHandler,
//   86   USB_LP_CAN_RX0_IRQHandler,
//   87   CAN_RX1_IRQHandler,
//   88   CAN_SCE_IRQHandler,
//   89   EXTI9_5_IRQHandler,
//   90   TIM1_BRK_IRQHandler,
//   91   TIM1_UP_IRQHandler,
//   92   TIM1_TRG_COM_IRQHandler,
//   93   TIM1_CC_IRQHandler,
//   94   TIM2_IRQHandler,
//   95   TIM3_IRQHandler,
//   96   TIM4_IRQHandler,
//   97   I2C1_EV_IRQHandler,
//   98   I2C1_ER_IRQHandler,
//   99   I2C2_EV_IRQHandler,
//  100   I2C2_ER_IRQHandler,
//  101   SPI1_IRQHandler,
//  102   SPI2_IRQHandler,
//  103   USART1_IRQHandler,
//  104   USART2_IRQHandler,
//  105   USART3_IRQHandler,
//  106   EXTI15_10_IRQHandler,
//  107   RTCAlarm_IRQHandler,
//  108   USBWakeUp_IRQHandler,
//  109   TIM8_BRK_IRQHandler,
//  110   TIM8_UP_IRQHandler,
//  111   TIM8_TRG_COM_IRQHandler,
//  112   TIM8_CC_IRQHandler,
//  113   ADC3_IRQHandler,
//  114   FSMC_IRQHandler,
//  115   SDIO_IRQHandler,
//  116   TIM5_IRQHandler,
//  117   SPI3_IRQHandler,
//  118   UART4_IRQHandler,
//  119   UART5_IRQHandler,
//  120   TIM6_IRQHandler,
//  121   TIM7_IRQHandler,
//  122   DMA2_Channel1_IRQHandler,
//  123   DMA2_Channel2_IRQHandler,
//  124   DMA2_Channel3_IRQHandler,
//  125   DMA2_Channel4_5_IRQHandler,
//  126 };
//  127 #ifdef DATA_IN_ExtSRAM
//  128 #pragma language=extended
//  129 
//  130 __interwork int __low_level_init(void);
//  131 
//  132 #pragma location="ICODE"
//  133 __interwork int __low_level_init(void)
//  134 {
//  135    
//  136 /* FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is 
//  137   required, then adjust the Register Addresses*/
//  138 
//  139   /* Enable FSMC clock */
//  140   *(vu32 *)0x40021014 = 0x00000114;
//  141   
//  142   /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */  
//  143   *(vu32 *)0x40021018 = 0x000001E0;
//  144   
//  145 /* ---------------  SRAM Data lines, NOE and NWE configuration ---------------*/
//  146 /*----------------  SRAM Address lines configuration -------------------------*/
//  147 /*----------------  NOE and NWE configuration --------------------------------*/  
//  148 /*----------------  NE3 configuration ----------------------------------------*/
//  149 /*----------------  NBL0, NBL1 configuration ---------------------------------*/
//  150   
//  151   *(vu32 *)0x40011400 = 0x44BB44BB;
//  152   *(vu32 *)0x40011404 = 0xBBBBBBBB;
//  153   
//  154   *(vu32 *)0x40011800 = 0xB44444BB;
//  155   *(vu32 *)0x40011804 = 0xBBBBBBBB;
//  156    
//  157   *(vu32 *)0x40011C00 = 0x44BBBBBB;
//  158   *(vu32 *)0x40011C04 = 0xBBBB4444;  
//  159 
//  160   *(vu32 *)0x40012000 = 0x44BBBBBB;
//  161   *(vu32 *)0x40012004 = 0x44444B44;
//  162   
//  163 /*----------------  FSMC Configuration ---------------------------------------*/  
//  164 /*----------------  Enable FSMC Bank1_SRAM Bank ------------------------------*/
//  165   
//  166   *(vu32 *)0xA0000010 = 0x00001011;
//  167   *(vu32 *)0xA0000014 = 0x00000200;
//  168   
//  169 
//  170   return (1);
//  171 }
//  172 #endif /*DATA_IN_ExtSRAM*/
//  173 
//  174 /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
//  175 
// 
// 304 bytes in segment INTVEC
// 
// 304 bytes of CONST memory
//
//Errors: none
//Warnings: none