lpc23_emac.txt
来自「工厂环境污染控制数据采集器」· 文本 代码 · 共 796 行 · 第 1/3 页
TXT
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; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 939] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o.\obj\lpc23_emac.o --depend=.\obj\lpc23_emac.d --device=DARMP --apcs=interwork -O0 -IC:\Keil\ARM\INC\Philips --omf_browse=.\obj\lpc23_emac.crf LPC23_EMAC.c]
ARM
AREA ||.text||, CODE, READONLY, ALIGN=2
interrupt_ethernet PROC
;;;240
;;;241 static void interrupt_ethernet (void) __irq {
000000 e92d5fff PUSH {r0-r12,lr}
;;;242 /* EMAC Ethernet Controller Interrupt function. */
;;;243 OS_FRAME *frame;
;;;244 U32 idx,int_stat,RxLen,info;
;;;245 U32 *sp,*dp;
;;;246
;;;247 while ((int_stat = (MAC_INTSTATUS & MAC_INTENABLE)) != 0) {
000004 ea000034 B |L1.220|
|L1.8|
;;;248 MAC_INTCLEAR = int_stat;
000008 e59f05e0 LDR r0,|L1.1520|
00000c e5806fe8 STR r6,[r0,#0xfe8]
;;;249 if (int_stat & INT_RX_DONE) {
000010 e3160008 TST r6,#8
000014 0a00002f BEQ |L1.216|
;;;250 /* Packet received, check if packet is valid. */
;;;251 idx = MAC_RXCONSUMEINDEX;
000018 e59f05d0 LDR r0,|L1.1520|
00001c e5905118 LDR r5,[r0,#0x118]
;;;252 while (idx != MAC_RXPRODUCEINDEX) {
000020 ea000028 B |L1.200|
|L1.36|
;;;253 info = Rx_Stat[idx].Info;
000024 e59f05c8 LDR r0,|L1.1524|
000028 e7908185 LDR r8,[r0,r5,LSL #3]
;;;254 if (!(info & RINFO_LAST_FLAG)) {
00002c e3180101 TST r8,#0x40000000
000030 1a000000 BNE |L1.56|
;;;255 goto rel;
000034 ea00001c B |L1.172|
|L1.56|
;;;256 }
;;;257
;;;258 RxLen = (info & RINFO_SIZE) - 3;
000038 e1a00a88 LSL r0,r8,#21
00003c e1a00aa0 LSR r0,r0,#21
000040 e2407003 SUB r7,r0,#3
;;;259 if (RxLen > ETH_MTU || (info & RINFO_ERR_MASK)) {
000044 e59f05ac LDR r0,|L1.1528|
000048 e1570000 CMP r7,r0
00004c 8a000002 BHI |L1.92|
000050 e59f05a4 LDR r0,|L1.1532|
000054 e1100008 TST r0,r8
000058 0a000000 BEQ |L1.96|
|L1.92|
;;;260 /* Invalid frame, ignore it and free buffer. */
;;;261 goto rel;
00005c ea000012 B |L1.172|
|L1.96|
;;;262 }
;;;263 /* Flag 0x80000000 to skip sys_error() call when out of memory. */
;;;264 frame = alloc_mem (RxLen | 0x80000000);
000060 e3870102 ORR r0,r7,#0x80000000
000064 ebfffffe BL alloc_mem
000068 e1a04000 MOV r4,r0
;;;265 /* if 'alloc_mem()' has failed, ignore this packet. */
;;;266 if (frame != NULL) {
00006c e3540000 CMP r4,#0
000070 0a00000c BEQ |L1.168|
;;;267 dp = (U32 *)&frame->data[0];
000074 e284a004 ADD r10,r4,#4
;;;268 sp = (U32 *)Rx_Desc[idx].Packet;
000078 e59f0580 LDR r0,|L1.1536|
00007c e7909185 LDR r9,[r0,r5,LSL #3]
;;;269 for (RxLen = (RxLen + 3) >> 2; RxLen; RxLen--) {
000080 e2870003 ADD r0,r7,#3
000084 e1a07120 LSR r7,r0,#2
000088 ea000002 B |L1.152|
|L1.140|
;;;270 *dp++ = *sp++;
00008c e4990004 LDR r0,[r9],#4
000090 e48a0004 STR r0,[r10],#4
000094 e2477001 SUB r7,r7,#1 ;269
|L1.152|
000098 e3570000 CMP r7,#0 ;269
00009c 1afffffa BNE |L1.140|
;;;271 }
;;;272 put_in_queue (frame);
0000a0 e1a00004 MOV r0,r4
0000a4 ebfffffe BL put_in_queue
|L1.168|
;;;273 }
;;;274 rel: if (++idx == NUM_RX_FRAG) idx = 0;
0000a8 e1a00000 MOV r0,r0
|L1.172|
0000ac e2850001 ADD r0,r5,#1
0000b0 e1a05000 MOV r5,r0
0000b4 e3500004 CMP r0,#4
0000b8 1a000000 BNE |L1.192|
0000bc e3a05000 MOV r5,#0
|L1.192|
;;;275 /* Release frame from EMAC buffer. */
;;;276 MAC_RXCONSUMEINDEX = idx;
0000c0 e59f0528 LDR r0,|L1.1520|
0000c4 e5805118 STR r5,[r0,#0x118]
|L1.200|
0000c8 e59f0520 LDR r0,|L1.1520|
0000cc e5900114 LDR r0,[r0,#0x114] ;252
0000d0 e1500005 CMP r0,r5 ;252
0000d4 1affffd2 BNE |L1.36|
|L1.216|
;;;277 }
;;;278 }
;;;279 if (int_stat & INT_TX_DONE) {
0000d8 e1a00000 MOV r0,r0
|L1.220|
0000dc e59f050c LDR r0,|L1.1520|
0000e0 e5900fe0 LDR r0,[r0,#0xfe0] ;247
0000e4 e59f1504 LDR r1,|L1.1520|
0000e8 e5911fe4 LDR r1,[r1,#0xfe4] ;247
0000ec e0106001 ANDS r6,r0,r1 ;247
0000f0 1affffc4 BNE |L1.8|
;;;280 /* Frame transmit completed. */
;;;281 }
;;;282 }
;;;283 /* Acknowledge the interrupt. */
;;;284 VICVectAddr = 0;
0000f4 e3a00000 MOV r0,#0
0000f8 e5000100 STR r0,[r0,#-0x100]
;;;285 }
0000fc e8bd5fff POP {r0-r12,lr}
000100 e25ef004 SUBS pc,lr,#4
;;;286
ENDP
tx_descr_init PROC
;;;316
;;;317 for (i = 0; i < NUM_TX_FRAG; i++) {
000104 e3a00000 MOV r0,#0
000108 ea00000a B |L1.312|
|L1.268|
;;;318 Tx_Desc[i].Packet = (U32)&tx_buf[i];
00010c e0801080 ADD r1,r0,r0,LSL #1
000110 e59f24ec LDR r2,|L1.1540|
000114 e0821481 ADD r1,r2,r1,LSL #9
000118 e59f24e8 LDR r2,|L1.1544|
00011c e7821180 STR r1,[r2,r0,LSL #3]
;;;319 Tx_Desc[i].Ctrl = 0;
000120 e3a01000 MOV r1,#0
000124 e0822180 ADD r2,r2,r0,LSL #3
000128 e5821004 STR r1,[r2,#4]
;;;320 Tx_Stat[i].Info = 0;
00012c e59f24d8 LDR r2,|L1.1548|
000130 e7821100 STR r1,[r2,r0,LSL #2]
000134 e2800001 ADD r0,r0,#1 ;317
|L1.312|
000138 e3500003 CMP r0,#3 ;317
00013c 3afffff2 BCC |L1.268|
;;;321 }
;;;322
;;;323 /* Set EMAC Transmit Descriptor Registers. */
;;;324 MAC_TXDESCRIPTOR = (U32)&Tx_Desc[0];
000140 e59f14c0 LDR r1,|L1.1544|
000144 e59f24a4 LDR r2,|L1.1520|
000148 e582111c STR r1,[r2,#0x11c]
;;;325 MAC_TXSTATUS = (U32)&Tx_Stat[0];
00014c e2811018 ADD r1,r1,#0x18
000150 e5821120 STR r1,[r2,#0x120]
;;;326 MAC_TXDESCRIPTORNUM = NUM_TX_FRAG-1;
000154 e3a01002 MOV r1,#2
000158 e5821124 STR r1,[r2,#0x124]
;;;327
;;;328 /* Tx Descriptors Point to 0 */
;;;329 MAC_TXPRODUCEINDEX = 0;
00015c e3a01000 MOV r1,#0
000160 e5821128 STR r1,[r2,#0x128]
;;;330 }
000164 e12fff1e BX lr
;;;331
ENDP
rx_descr_init PROC
;;;293
;;;294 for (i = 0; i < NUM_RX_FRAG; i++) {
000168 e3a00000 MOV r0,#0
00016c ea00000d B |L1.424|
|L1.368|
;;;295 Rx_Desc[i].Packet = (U32)&rx_buf[i];
000170 e0801080 ADD r1,r0,r0,LSL #1
000174 e59f2494 LDR r2,|L1.1552|
000178 e0821481 ADD r1,r2,r1,LSL #9
00017c e2422064 SUB r2,r2,#0x64
000180 e7821180 STR r1,[r2,r0,LSL #3]
;;;296 Rx_Desc[i].Ctrl = RCTRL_INT | (ETH_FRAG_SIZE-1);
000184 e59f1488 LDR r1,|L1.1556|
000188 e0822180 ADD r2,r2,r0,LSL #3
00018c e5821004 STR r1,[r2,#4]
;;;297 Rx_Stat[i].Info = 0;
000190 e3a01000 MOV r1,#0
000194 e59f2458 LDR r2,|L1.1524|
000198 e7821180 STR r1,[r2,r0,LSL #3]
;;;298 Rx_Stat[i].HashCRC = 0;
00019c e0822180 ADD r2,r2,r0,LSL #3
0001a0 e5821004 STR r1,[r2,#4]
0001a4 e2800001 ADD r0,r0,#1 ;294
|L1.424|
0001a8 e3500004 CMP r0,#4 ;294
0001ac 3affffef BCC |L1.368|
;;;299 }
;;;300
;;;301 /* Set EMAC Receive Descriptor Registers. */
;;;302 MAC_RXDESCRIPTOR = (U32)&Rx_Desc[0];
0001b0 e59f1448 LDR r1,|L1.1536|
0001b4 e59f2434 LDR r2,|L1.1520|
0001b8 e5821108 STR r1,[r2,#0x108]
;;;303 MAC_RXSTATUS = (U32)&Rx_Stat[0];
0001bc e2811020 ADD r1,r1,#0x20
0001c0 e582110c STR r1,[r2,#0x10c]
;;;304 MAC_RXDESCRIPTORNUM = NUM_RX_FRAG-1;
0001c4 e3a01003 MOV r1,#3
0001c8 e5821110 STR r1,[r2,#0x110]
;;;305
;;;306 /* Rx Descriptors Point to 0 */
;;;307 MAC_RXCONSUMEINDEX = 0;
0001cc e3a01000 MOV r1,#0
0001d0 e5821118 STR r1,[r2,#0x118]
;;;308 }
0001d4 e12fff1e BX lr
;;;309
ENDP
read_PHY PROC
;;;353
;;;354 static U16 read_PHY (U32 PhyReg) {
0001d8 e1a01000 MOV r1,r0
;;;355 /* Read a PHY register 'PhyReg'. */
;;;356 U32 tout;
;;;357
;;;358 MAC_MADR = DP83848C_DEF_ADR | PhyReg;
0001dc e3810c01 ORR r0,r1,#0x100
0001e0 e59f3408 LDR r3,|L1.1520|
0001e4 e5830028 STR r0,[r3,#0x28]
;;;359 MAC_MCMD = MCMD_READ;
0001e8 e3a00001 MOV r0,#1
0001ec e5830024 STR r0,[r3,#0x24]
;;;360
;;;361 /* Wait until operation completed */
;;;362 tout = 0;
0001f0 e3a02000 MOV r2,#0
;;;363 for (tout = 0; tout < MII_RD_TOUT; tout++) {
0001f4 e1a00000 MOV r0,r0
0001f8 ea000005 B |L1.532|
|L1.508|
;;;364 if ((MAC_MIND & MIND_BUSY) == 0) {
0001fc e59f03ec LDR r0,|L1.1520|
000200 e5900034 LDR r0,[r0,#0x34]
000204 e3100001 TST r0,#1
000208 1a000000 BNE |L1.528|
;;;365 break;
00020c ea000002 B |L1.540|
|L1.528|
000210 e2822001 ADD r2,r2,#1 ;363
|L1.532|
000214 e3520805 CMP r2,#0x50000 ;363
000218 3afffff7 BCC |L1.508|
|L1.540|
00021c e1a00000 MOV r0,r0
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