uart_tx.vhd.bak

tranmiss data from kit to computer via com.

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY UART_TX IS
GENERIC(
		SYNC_CLOCK	: INTEGER := 50000000;
		BAUD_RATE	: INTEGER := 9600
	);
PORT(
		CLOCK		: IN STD_LOGIC;
		TXD_START	: IN STD_LOGIC;
		TXD_DATA	: IN STD_LOGIC_VECTOR(7 DOWNTO 0);
		
		TXD			: OUT STD_LOGIC;
		TXD_BUSY	: OUT STD_LOGIC
	);
END UART_TX;


ARCHITECTURE BEHAV OF UART_TX IS
TYPE 	STATE_TYPE IS (IDLE, START, BIT0, BIT1, BIT2, BIT3, BIT4, BIT5, BIT6, BIT7, STOP);
--	SIGNAL ---------------------------
SIGNAL 	STATE			: STATE_TYPE := IDLE;
SIGNAL 	BAUD_TICK		: STD_LOGIC := '0';
SIGNAL 	BAUD_COUNT		: INTEGER := 0;
SIGNAL 	BAUD_DIVIDER	: integer range 0 to (SYNC_CLOCK/100 + BAUD_RATE/100 - 1) := 0;

SIGNAL 	SENT_ENABLE		: STD_LOGIC := '0';
SIGNAL	SENT_DATA		: STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL	SENT_ACTIVE		: STD_LOGIC := '0';
BEGIN

	BAUD_GEN: PROCESS(CLOCK)
	BEGIN
		IF (CLOCK'EVENT AND CLOCK = '1') THEN
			IF (SENT_ENABLE = '1') THEN
				BAUD_DIVIDER <= BAUD_DIVIDER + (BAUD_RATE/100);
				if (BAUD_DIVIDER > (SYNC_CLOCK/100)) then
					BAUD_TICK 		<= '1';
					BAUD_DIVIDER 	<= 0;
				else
					BAUD_TICK 		<= '0';
				end if;
			END IF;
		END IF;
	END PROCESS;
	
	STATE_SWITCH: PROCESS(BAUD_TICK)
	BEGIN
		IF (BAUD_TICK'EVENT AND BAUD_TICK = '1') THEN
			CASE STATE IS
				WHEN IDLE 	=> STATE <= START;
				WHEN START 	=> STATE <= BIT0;
				WHEN BIT0 	=> STATE <= BIT1;
				WHEN BIT1 	=> STATE <= BIT2;
				WHEN BIT2 	=> STATE <= BIT3;
				WHEN BIT3 	=> STATE <= BIT4;
				WHEN BIT4 	=> STATE <= BIT5;
				WHEN BIT5 	=> STATE <= BIT6;
				WHEN BIT6 	=> STATE <= BIT7;
				WHEN BIT7 	=> STATE <= STOP;
				WHEN STOP 	=> STATE <= IDLE;
			END CASE;
		END IF;
	END PROCESS;
	
	LINE_STATUS: PROCESS(BAUD_TICK)
	BEGIN
		IF (BAUD_TICK'EVENT AND BAUD_TICK = '1') THEN
			CASE STATE IS
				WHEN IDLE 	=> TXD <= '1';
				WHEN START 	=> TXD <= '0';
				WHEN BIT0 	=> TXD <= SENT_DATA(0);
				WHEN BIT1 	=> TXD <= SENT_DATA(1);
				WHEN BIT2 	=> TXD <= SENT_DATA(2);
				WHEN BIT3 	=> TXD <= SENT_DATA(3);
				WHEN BIT4 	=> TXD <= SENT_DATA(4);
				WHEN BIT5 	=> TXD <= SENT_DATA(5);
				WHEN BIT6 	=> TXD <= SENT_DATA(6);
				WHEN BIT7 	=> TXD <= SENT_DATA(7);
				WHEN STOP 	=> TXD <= '1';
			END CASE;
		END IF;
	END PROCESS;
	
	START_CONDITION: PROCESS(CLOCK)
	BEGIN
		IF (CLOCK'EVENT AND CLOCK = '1') THEN
			IF (SENT_ENABLE = '0') THEN
				IF (TXD_START = '1' AND SENT_ACTIVE = '0') THEN
					SENT_ENABLE <= '1';
					SENT_DATA <= TXD_DATA;
					SENT_ACTIVE <= '1';
				ELSIF (TXD_START = '0') THEN
					SENT_ACTIVE <= '0';
				END IF;
			ELSE
				IF (STATE = IDLE AND BAUD_TICK = '1') THEN
					SENT_ENABLE <= '0';
				END IF;
				IF (TXD_START = '0') THEN
					SENT_ACTIVE <= '0';
				END IF;
			END IF;
		END IF;
	END PROCESS;
	
	TXD_BUSY <= SENT_ENABLE;
	
END BEHAV;