prev_cmp_test.qmsg

tranmiss data from kit to computer via com.

{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|TEST\|UART_TX:TXD_BLOCK\|STATE " "Info: Selected Auto state machine encoding method for state machine \"\|TEST\|UART_TX:TXD_BLOCK\|STATE\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|TEST\|UART_TX:TXD_BLOCK\|STATE " "Info: Encoding result for state machine \"\|TEST\|UART_TX:TXD_BLOCK\|STATE\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "11 " "Info: Completed encoding using 11 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.stop " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.stop\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.bit7 " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.bit7\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.bit6 " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.bit6\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.bit5 " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.bit5\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.bit4 " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.bit4\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.bit3 " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.bit3\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.bit2 " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.bit2\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.bit1 " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.bit1\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.bit0 " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.bit0\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.start " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.start\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "UART_TX:TXD_BLOCK\|STATE.idle " "Info: Encoded state bit \"UART_TX:TXD_BLOCK\|STATE.idle\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.idle 00000000000 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.idle\" uses code string \"00000000000\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.start 00000000011 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.start\" uses code string \"00000000011\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit0 00000000101 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit0\" uses code string \"00000000101\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit1 00000001001 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit1\" uses code string \"00000001001\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit2 00000010001 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit2\" uses code string \"00000010001\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit3 00000100001 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit3\" uses code string \"00000100001\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit4 00001000001 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit4\" uses code string \"00001000001\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit5 00010000001 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit5\" uses code string \"00010000001\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit6 00100000001 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit6\" uses code string \"00100000001\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit7 01000000001 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.bit7\" uses code string \"01000000001\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|TEST\|UART_TX:TXD_BLOCK\|STATE.stop 10000000001 " "Info: State \"\|TEST\|UART_TX:TXD_BLOCK\|STATE.stop\" uses code string \"10000000001\"" {  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0}  } { { "UART_TX.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/UART_TX.vhd" 24 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "LEDG\[0\] GND " "Warning (13410): Pin \"LEDG\[0\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDG\[1\] GND " "Warning (13410): Pin \"LEDG\[1\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDG\[2\] GND " "Warning (13410): Pin \"LEDG\[2\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDG\[3\] GND " "Warning (13410): Pin \"LEDG\[3\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDG\[4\] GND " "Warning (13410): Pin \"LEDG\[4\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDG\[5\] GND " "Warning (13410): Pin \"LEDG\[5\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDG\[6\] GND " "Warning (13410): Pin \"LEDG\[6\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDG\[7\] GND " "Warning (13410): Pin \"LEDG\[7\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX0\[6\] GND " "Warning (13410): Pin \"HEX0\[6\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX0\[5\] GND " "Warning (13410): Pin \"HEX0\[5\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX0\[4\] GND " "Warning (13410): Pin \"HEX0\[4\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX0\[3\] GND " "Warning (13410): Pin \"HEX0\[3\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX0\[2\] GND " "Warning (13410): Pin \"HEX0\[2\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX0\[1\] GND " "Warning (13410): Pin \"HEX0\[1\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX0\[0\] GND " "Warning (13410): Pin \"HEX0\[0\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX1\[6\] GND " "Warning (13410): Pin \"HEX1\[6\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX1\[5\] GND " "Warning (13410): Pin \"HEX1\[5\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX1\[4\] GND " "Warning (13410): Pin \"HEX1\[4\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX1\[3\] GND " "Warning (13410): Pin \"HEX1\[3\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX1\[2\] GND " "Warning (13410): Pin \"HEX1\[2\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX1\[1\] GND " "Warning (13410): Pin \"HEX1\[1\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX1\[0\] GND " "Warning (13410): Pin \"HEX1\[0\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX2\[6\] GND " "Warning (13410): Pin \"HEX2\[6\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX2\[5\] GND " "Warning (13410): Pin \"HEX2\[5\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX2\[4\] GND " "Warning (13410): Pin \"HEX2\[4\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX2\[3\] GND " "Warning (13410): Pin \"HEX2\[3\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX2\[2\] GND " "Warning (13410): Pin \"HEX2\[2\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX2\[1\] GND " "Warning (13410): Pin \"HEX2\[1\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX2\[0\] GND " "Warning (13410): Pin \"HEX2\[0\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX3\[6\] GND " "Warning (13410): Pin \"HEX3\[6\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX3\[5\] GND " "Warning (13410): Pin \"HEX3\[5\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX3\[4\] GND " "Warning (13410): Pin \"HEX3\[4\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX3\[3\] GND " "Warning (13410): Pin \"HEX3\[3\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX3\[2\] GND " "Warning (13410): Pin \"HEX3\[2\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX3\[1\] GND " "Warning (13410): Pin \"HEX3\[1\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "HEX3\[0\] GND " "Warning (13410): Pin \"HEX3\[0\]\" is stuck at GND" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0 0}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "6 " "Warning: Design contains 6 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "UART_RXD " "Warning (15610): No output dependent on input pin \"UART_RXD\"" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 7 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[8\] " "Warning (15610): No output dependent on input pin \"SW\[8\]\"" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 8 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[0\] " "Warning (15610): No output dependent on input pin \"KEY\[0\]\"" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 9 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[1\] " "Warning (15610): No output dependent on input pin \"KEY\[1\]\"" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 9 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[2\] " "Warning (15610): No output dependent on input pin \"KEY\[2\]\"" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 9 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[3\] " "Warning (15610): No output dependent on input pin \"KEY\[3\]\"" {  } { { "TEST.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/UART_TX/TEST.vhd" 9 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 0}  } {  } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "112 " "Info: Implemented 112 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "16 " "Info: Implemented 16 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_OPINS" "47 " "Info: Implemented 47 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_LCELLS" "49 " "Info: Implemented 49 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 84 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 84 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "196 " "Info: Peak virtual memory: 196 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Oct 21 15:24:21 2008 " "Info: Processing ended: Tue Oct 21 15:24:21 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Info: Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Full Version " "Info: Version 8.0 Build 215 05/29/2008 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Oct 21 15:24:22 2008 " "Info: Processing started: Tue Oct 21 15:24:22 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off TEST -c TEST " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off TEST -c TEST" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "TEST EP2C20F484C7 " "Info: Selected device EP2C20F484C7 for design \"TEST\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0 0}
{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock incremental compilation " "Warning: Feature LogicLock incremental compilation is not available with your current license" {  } {  } 0 0 "Feature %1!s! is not available with your current license" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C15AF484C7 " "Info: Device EP2C15AF484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C35F484C7 " "Info: Device EP2C35F484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C50F484C7 " "Info: Device EP2C50F484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0 0}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "3 " "Info: Fitter converted 3 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ C4 " "Info: Pin ~ASDO~ is reserved at location C4" {  } { { "c:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/80/quartus/bin/pin_planner.ppl" { ~ASDO~ } } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ C3 " "Info: Pin ~nCSO~ is reserved at location C3" {  } { { "c:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/80/quartus/bin/pin_planner.ppl" { ~nCSO~ } } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~LVDS91p/nCEO~ W20 " "Info: Pin ~LVDS91p/nCEO~ is reserved at location W20" {  } { { "c:/altera/80/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/80/quartus/bin/pin_planner.ppl" { ~LVDS91p/nCEO~ } } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~LVDS91p/nCEO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0 0}