test.tan.summary

来自「tranmiss data from kit to computer via c」· SUMMARY 代码 · 共 67 行

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 2.416 ns
From           : SW[9]
To             : UART_TX:TXD_BLOCK|SENT_DATA[3]
From Clock     : --
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 10.627 ns
From           : UART_TX:TXD_BLOCK|TXD
To             : UART_TXD
From Clock     : CLOCK_50
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 6.636 ns
From           : SW[7]
To             : LEDR[7]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 0.693 ns
From           : SW[2]
To             : UART_TX:TXD_BLOCK|SENT_DATA[2]
From Clock     : --
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Clock Setup: 'CLOCK_50'
Slack          : N/A
Required Time  : None
Actual Time    : 244.44 MHz ( period = 4.091 ns )
From           : UART_TX:TXD_BLOCK|SENT_ENABLE
To             : UART_TX:TXD_BLOCK|BAUD_TICK
From Clock     : CLOCK_50
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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