test.hier_info

receiver data from computer via com-interface.

|TEST
CLOCK_50 => UART_RX:RXD_BLOCK.CLOCK
UART_RXD => UART_RX:RXD_BLOCK.RXD
SW[0] => ~NO_FANOUT~
SW[1] => ~NO_FANOUT~
SW[2] => ~NO_FANOUT~
SW[3] => ~NO_FANOUT~
SW[4] => ~NO_FANOUT~
SW[5] => ~NO_FANOUT~
SW[6] => ~NO_FANOUT~
SW[7] => ~NO_FANOUT~
SW[8] => ~NO_FANOUT~
SW[9] => ~NO_FANOUT~
KEY[0] => ~NO_FANOUT~
KEY[1] => ~NO_FANOUT~
KEY[2] => ~NO_FANOUT~
KEY[3] => ~NO_FANOUT~
UART_TXD <= <GND>
LEDR[0] <= <GND>
LEDR[1] <= <GND>
LEDR[2] <= <GND>
LEDR[3] <= <GND>
LEDR[4] <= <GND>
LEDR[5] <= <GND>
LEDR[6] <= <GND>
LEDR[7] <= <GND>
LEDR[8] <= <GND>
LEDR[9] <= <GND>
LEDG[0] <= LEDG[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
LEDG[1] <= LEDG[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
LEDG[2] <= LEDG[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
LEDG[3] <= LEDG[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
LEDG[4] <= LEDG[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
LEDG[5] <= LEDG[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
LEDG[6] <= LEDG[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
LEDG[7] <= LEDG[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
HEX0[6] <= <GND>
HEX0[5] <= <GND>
HEX0[4] <= <GND>
HEX0[3] <= <GND>
HEX0[2] <= <GND>
HEX0[1] <= <GND>
HEX0[0] <= <GND>
HEX1[6] <= <GND>
HEX1[5] <= <GND>
HEX1[4] <= <GND>
HEX1[3] <= <GND>
HEX1[2] <= <GND>
HEX1[1] <= <GND>
HEX1[0] <= <GND>
HEX2[6] <= <GND>
HEX2[5] <= <GND>
HEX2[4] <= <GND>
HEX2[3] <= <GND>
HEX2[2] <= <GND>
HEX2[1] <= <GND>
HEX2[0] <= <GND>
HEX3[6] <= <GND>
HEX3[5] <= <GND>
HEX3[4] <= <GND>
HEX3[3] <= <GND>
HEX3[2] <= <GND>
HEX3[1] <= <GND>
HEX3[0] <= <GND>


|TEST|UART_RX:RXD_BLOCK
CLOCK => BAUD_DIVIDER[18].CLK
CLOCK => BAUD_DIVIDER[17].CLK
CLOCK => BAUD_DIVIDER[16].CLK
CLOCK => BAUD_DIVIDER[15].CLK
CLOCK => BAUD_DIVIDER[14].CLK
CLOCK => BAUD_DIVIDER[13].CLK
CLOCK => BAUD_DIVIDER[12].CLK
CLOCK => BAUD_DIVIDER[11].CLK
CLOCK => BAUD_DIVIDER[10].CLK
CLOCK => BAUD_DIVIDER[9].CLK
CLOCK => BAUD_DIVIDER[8].CLK
CLOCK => BAUD_DIVIDER[7].CLK
CLOCK => BAUD_DIVIDER[6].CLK
CLOCK => BAUD_DIVIDER[5].CLK
CLOCK => BAUD_DIVIDER[4].CLK
CLOCK => BAUD_DIVIDER[3].CLK
CLOCK => BAUD_DIVIDER[2].CLK
CLOCK => BAUD_DIVIDER[1].CLK
CLOCK => BAUD_DIVIDER[0].CLK
CLOCK => BAUD_TICK.CLK
CLOCK => RECEIVE_BUSY.CLK
CLOCK => RXD_DATA[7]~reg0.CLK
CLOCK => RXD_DATA[6]~reg0.CLK
CLOCK => RXD_DATA[5]~reg0.CLK
CLOCK => RXD_DATA[4]~reg0.CLK
CLOCK => RXD_DATA[3]~reg0.CLK
CLOCK => RXD_DATA[2]~reg0.CLK
CLOCK => RXD_DATA[1]~reg0.CLK
CLOCK => RXD_DATA[0]~reg0.CLK
RXD => RECEIVE_BUSY~0.OUTPUTSELECT
RXD => RECEIVE_DATA[0].DATAIN
RXD => RECEIVE_DATA[1].DATAIN
RXD => RECEIVE_DATA[2].DATAIN
RXD => RECEIVE_DATA[3].DATAIN
RXD => RECEIVE_DATA[4].DATAIN
RXD => RECEIVE_DATA[5].DATAIN
RXD => RECEIVE_DATA[6].DATAIN
RXD => RECEIVE_DATA[7].DATAIN
RXD_DATA_VALID <= RECEIVE_BUSY.DB_MAX_OUTPUT_PORT_TYPE
RXD_DATA[0] <= RXD_DATA[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
RXD_DATA[1] <= RXD_DATA[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
RXD_DATA[2] <= RXD_DATA[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
RXD_DATA[3] <= RXD_DATA[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
RXD_DATA[4] <= RXD_DATA[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
RXD_DATA[5] <= RXD_DATA[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
RXD_DATA[6] <= RXD_DATA[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
RXD_DATA[7] <= RXD_DATA[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE