📄 hardware.lst
字号:
// or F_SACM_A2000_Initial:
// Note: The following functions are the partial code of original
// initial subroutine. (H/W setting part)
//
// Ex: F_SACM_A2000_Initial:
// ...
// call F_SP_SACM_A2000_Init_ : S480/S240/MS01 is same
// ...
// retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A2000_Init_:
0000BC59 40 92 r1=0x0000; // 24MHz, Fcpu=Fosc
0000BC5A 19 D3 13 70 [P_SystemClock]=r1 // Frequency 20MHz
0000BC5C 70 92 r1 = 0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BC5D 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
0000BC5F 09 93 00 FD r1 = 0xfd00 // 16K
0000BC61 19 D3 0A 70 [P_TimerA_Data] = r1
0000BC63 09 93 A8 00 r1 = 0x00A8 // Set the DAC Ctrl
0000BC65 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000BC67 09 93 FF FF r1 = 0xffff
0000BC69 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000BC6B 40 92 r1 =0x0000 //
0000BC6C 11 93 A8 01 r1 = [R_InterruptStatus] //
0000BC6E 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz
0000BC70 19 D3 A8 01 [R_InterruptStatus] = r1 //
0000BC72 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000BC74 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S480_Initial()
// or F_SACM_S480_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S480_Init_:
0000BC75 40 92 r1 = 0x0000 // 24MHz Fosc
0000BC76 19 D3 13 70 [P_SystemClock]=r1 // Initial System Clock
0000BC78 70 92 r1=0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BC79 19 D3 0B 70 [P_TimerA_Ctrl]=r1 // Initial Timer A
//R1 = 0xfd00 // 16K
0000BC7B 09 93 ED FC r1 = 0xfced // 15.625K
0000BC7D 19 D3 0A 70 [P_TimerA_Data]=r1
0000BC7F 09 93 A8 00 r1 = 0x00A8 //
0000BC81 19 D3 2A 70 [P_DAC_Ctrl] = r1 //
0000BC83 09 93 FF FF r1 = 0xffff
0000BC85 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000BC87 11 93 A8 01 R1 = [R_InterruptStatus] //
0000BC89 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz // Enable 1KHz IRQ4 for S480 decoder
0000BC8B 19 D3 A8 01 [R_InterruptStatus] = r1 //
0000BC8D 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000BC8F 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S240_Initial()
// or F_SACM_S240_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S240_Init_:
0000BC90 60 92 r1=0x0020;
0000BC91 19 D3 13 70 [P_SystemClock]=r1
0000BC93 09 93 A8 00 r1 = 0x00A8; //
0000BC95 19 D3 2A 70 [P_DAC_Ctrl]= r1
0000BC97 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BC98 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
0000BC9A 09 93 00 FE r1 = 0xfe00; // 24K
0000BC9C 19 D3 0A 70 [P_TimerA_Data] = r1;
0000BC9E 09 93 FF FF r1 = 0xffff
0000BCA0 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000BCA2 11 93 A8 01 r1 = [R_InterruptStatus] //
0000BCA4 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
0000BCA6 19 D3 A8 01 [R_InterruptStatus] = r1 //
0000BCA8 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000BCAA 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_MS01_Initial:
// ...
// call F_SP_SACM_MS01_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
//////////////////////////////////////////////////////////////////
F_SP_SACM_MS01_Init_:
0000BCAB 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
0000BCAC 19 D3 13 70 [P_SystemClock] = r1; // Initial System Clock
0000BCAE 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BCAF 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
//R1 = 0x0003 // 8K
0000BCB1 40 92 r1 = 0x0000 // Fosc/2
0000BCB2 19 D3 0D 70 [P_TimerB_Ctrl] = r1; // Initial Timer B -> 8192
//R1 = 0xFFFF
0000BCB4 09 93 00 FA r1 = 0xFA00 // Any time for ADPCM channel 0,1
0000BCB6 19 D3 0C 70 [P_TimerB_Data] = r1 // 8K sample rate
0000BCB8 09 93 FF FF r1 = 0xffff
0000BCBA 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000BCBC 90 9A RETF
//........................................
F_SP_PlayMode0_: // with F_SP_SACM_MS01_Initial
0000BCBD 46 92 r1 = 0x0006
0000BCBE 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000BCC0 09 93 00 FE r1 = 0xFE00
0000BCC2 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000BCC4 11 93 A8 01 r1 = [R_InterruptStatus] //
0000BCC6 09 A3 10 84 r1 |= C_FIQ_PWM+C_IRQ2_TMB+C_IRQ4_1KHz
0000BCC8 19 D3 A8 01 [R_InterruptStatus] = r1 //
0000BCCA 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000BCCC 90 9A RETF
F_SP_PlayMode1_: // with F_SP_SACM_MS01_Initial
0000BCCD 09 93 A8 00 r1 = 0x00A8
0000BCCF 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000BCD1 09 93 00 FE r1 = 0xFE00
0000BCD3 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000BCD5 11 93 A8 01 r1 = [R_InterruptStatus] //
0000BCD7 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000BCD9 19 D3 A8 01 [R_InterruptStatus] = r1 //
0000BCDB 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000BCDD 90 9A RETF
F_SP_PlayMode2_: // with F_SP_SACM_MS01_Initial
0000BCDE 09 93 A8 00 r1 = 0x00A8
0000BCE0 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000BCE2 09 93 9A FD r1 = 0xFD9A
0000BCE4 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000BCE6 11 93 A8 01 r1 = [R_InterruptStatus] //
0000BCE8 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000BCEA 19 D3 A8 01 [R_InterruptStatus] = r1 //
0000BCEC 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000BCEE 90 9A RETF
F_SP_PlayMode3_: // with F_SP_SACM_MS01_Initial
0000BCEF 09 93 A8 00 r1 = 0x00A8
0000BCF1 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000BCF3 09 93 00 FD r1 = 0xFD00
0000BCF5 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000BCF7 11 93 A8 01 r1 = [R_InterruptStatus] //
0000BCF9 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000BCFB 19 D3 A8 01 [R_InterruptStatus] = r1 //
0000BCFD 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000BCFF 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_DVR_Initial:
// ...
// call F_SP_SACM_DVR_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
// Ex1:
// F_SACM_DVR_Record: (or F_SACM_DVR_InitEncoder)
// ...
// call F_SP_SACM_DVR_Rec_Init
// ...
// retf
// Ex2:
// F_SACM_DVR_Play: (or F_SACM_DVR_InitDecoder)
// ...
// call F_SP_SACM_DVR_Play_Init_
// ...
// retf
///////////////////////////////////////////////////////////////////////////////
F_SP_SACM_DVR_Init_:
0000BD00 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
0000BD01 19 D3 13 70 [P_SystemClock] = r1; // Frequency 20MHz
0000BD03 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BD04 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
0000BD06 09 93 00 FA r1 = 0xfa00; // 8K @ 24.576MHz
//r1 = 0xfb1d; // 8K @ 20MHz
0000BD08 19 D3 0A 70 [P_TimerA_Data] = r1;
0000BD0A 75 92 r1 = 0x0035; // ADINI should be open (107)
0000BD0B 19 D3 15 70 [P_ADC_Ctrl] = r1;
0000BD0D 09 93 A8 00 r1 = 0x00A8; // Set the DA Ctrl
0000BD0F 19 D3 2A 70 [P_DAC_Ctrl] = r1;
0000BD11 09 93 FF FF r1 = 0xffff;
0000BD13 19 D3 11 70 [P_INT_Clear] = r1; // Clear interrupt occuiped events
0000BD15 11 93 A8 01 r1 = [R_InterruptStatus] //
0000BD17 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
0000BD19 19 D3 A8 01 [R_InterruptStatus] = r1 //
0000BD1B 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000BD1D 90 9A RETF
F_SP_SACM_DVR_Rec_Init_: // call by SACM_DVR_Record / SACM_DVR_InitEncoder
0000BD1E 75 92 r1 = 0x0035; //mic input
//r1 = 0x0037 //line_in input
0000BD1F 19 D3 15 70 [P_ADC_Ctrl] = r1; //enable ADC
0000BD21 09 93 00 FE r1=0xfe00; //24K @ 24.576MHz
0000BD23 19 D3 0A 70 [P_TimerA_Data] = r1
0000BD25 90 9A RETF
F_SP_SACM_DVR_Play_Init_:
0000BD26 40 92 r1 = 0x0000 // call by SACM_DVR_Stop / SACM_DVR_Play
0000BD27 19 D3 15 70 [P_ADC_Ctrl] = r1; // Disable ADC
0000BD29 09 93 00 FD r1 = 0xfd00; // 16K @ 24.576MHz
0000BD2B 19 D3 0A 70 [P_TimerA_Data] = r1;
0000BD2D 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: Extra Functions provided by Sunplus
// Type:
// 1. DAC Ramp up/down
// 2. IO config/import/export
// 3. Get resource data
//
//
///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
// Function: Ramp Up/Down to avoid speaker "pow" noise
// Destory: R1,R2
////////////////////////////////////////////////////////
_SP_RampUpDAC1: .PROC
F_SP_RampUpDAC1:
0000BD2E 90 D4 push r1,r2 to [sp]
0000BD2F 11 93 17 70 r1=[P_DAC1]
0000BD31 09 B3 C0 FF r1 &= ~0x003f
0000BD33 09 43 00 80 cmp r1,0x8000
0000BD35 0E 0E jb L_RU_NormalUp
0000BD36 19 5E je L_RU_End
L_RU_DownLoop:
0000BD37 40 F0 9A BD call F_Delay
0000BD39 41 94 r2 = 0x0001
0000BD3A 1A D5 12 70 [P_Watchdog_Clear] = r2
0000BD3C 09 23 40 00 r1 -= 0x40
0000BD3E 19 D3 17 70 [P_DAC1] = r1
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -