root.vhd

来自「USBHostSlave is a USB 1.1 host and Devic」· VHDL 代码 · 共 18 行

library ieee;
use ieee.std_logic_1164.all;

library work;
use work.usbpkg.all;

entity root is
         generic (
          ADDR : natural := 0
        );

        port (
          signal dport : inout pkt
        );

end root;