sinewave.asm

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;**********************************************************************************
;  Wait Loop - 39us Per Complete Loop 33uS Delay + 6us Counter
;
;  IMPORTANT - Zero Cross must be configured to fire at 36us Before Zero for
;  Timing to be correct!!!!.
;
;**********************************************************************************       
WaitLoop
           
      
;**********************************************************************************
; Delay33 - This routine delays for 33uS and checks key status at same time
;**********************************************************************************
Delay33
       ;****** Check the Up 1% Pin ******
UPStart
       BTFSS   UpButton     ; Check if button PIN held LOW
       BSF     UpFlag       ; Indicate that button "HIGH"
       BTFSC   UpFlag       ; Check If Button Flag is 1
       BTFSS   UpButton     ; Check If button Pin has been released
       GOTO    UpEnd        ; If Flag not 1 or Button not released then skip to end
       INCF    Power        ; Increase the power output
       BCF     UpFlag       ; Clear the Flag
       GOTO    DownStart    ; Go to Next button check
UpEnd
       NOP                  ; Delay to give even time cycles for different directions
       NOP                  ; So that the total time taken does not change
       NOP                  ; to give an equal delay of 8 Cycles each time executed

       ;****** Check the Down 1% Pin ******
DownStart
       BTFSS   DownButton   ; Check if button PIN Held LOW
       BSF     DownFlag     ; Indicate that button "HIGH"
       BTFSC   DownFlag     ; Check If Button Flag is 1
       BTFSS   DownButton   ; Check If button Pin has been released
       GOTO    DownEnd      ; If Flag not 1 or Button not released then skip to end
       DECF    Power        ; Decrease the power output
       BCF     DownFlag     ; Clear the Flag
       GOTO    OnStart      ; Go to Next button check
DownEnd
       NOP                  ; Delay to give even time cycles for different directions
       NOP                  ; So that the total time taken does not change
       NOP                  ; to give an equal delay of 8 Cycles each time executed

       ;****** Check the FULL POWER pin *****
       MOVLW  0x64          ; Load 100% Value into W - Just in case its needed
OnStart
       BTFSS  OnPin         ; Check if On Pin is held LOW
       MOVWF  Power         ; If pin ON then load 100% into Power Register
      
OffStart
       BTFSS  OffPin        ; Check if Off Pin is held LOW
       CLRF   Power         ; Clear the Power Register - i.e. Set it to Zero.
       
       ;----------- 22 Instruction Cycles to Here from start of delay --------------       
      
       ;****** Check if value is -1 (i.e less than zero ******
       MOVF   Power,W       ; Load power into W
       XORLW  0xFF          ; OR with 256 (-1) if result == Zero then is equal to 256
       BTFSC  STATUS,Z      ; Check the Zero Flag
       CLRF   Power         ; If Zero flag was set then Clear the power setting (i.e set to zero %)
       
       ;****** Check if Value is  > 100%
       MOVLW  0x64          ; Load 100% into Reg for checking if > 100%
       SUBWF  Power,W       ; Subtract 100 from Power Rating
       BTFSS  STATUS,C      ; Check if result +ve of -ve
       GOTO   MaxEnd_1      ; result was positive so no need to adjust the setting
       MOVLW  0x64          ; Result -ve so adjust the power 
       MOVWF  Power         ; 
       GOTO   Max_End
MaxEnd_1
       NOP                  ; Timing Adjustment So Timing always the same
      
Max_End
       
       NOP
             
;    ;------------ 33 Instruction Cycles to this point from start of the delay -------
 
;****************************** END OF Delay33
      
      DECFSZ Count           ;-- Dec Counter 
      GOTO   WaitCheck       ;-- If not zero then wait another period
      BTFSC  NoPower         ;-- If NoPower bit set then do not ouput anything
      GOTO   WaitCheck       ;-- If Bit Set then Skip toggling Port
      MOVLW  MASK_ON         ;-- Load Tris to turn output ON
      TRIS   GPIO            ;-- Lower it!!
      BSF    NoPower         ;-- Indicate that have lowered pin
WaitCheck
      DECFSZ CountTotal      ;-- Dec Total Time Cycle
      GOTO   WaitLoop        ;-- If not zero Then keep Looping until all done
      GOTO   MainLoop        ;-- else restart the main loop






;**********************************************************************************
; PowerTable - The table for even power slices of a sine wave  (101 Words)
;              Using 39uS as the Time base.
;              Table has been reversed so that 100% power output is last in table
;              and Zero Power Output is First in the table
;**********************************************************************************
PowerTable:
    ADDWF PCL      ;-- Add Offset to PC to generate computed jump

    RETLW 0xFF     ;-- 0% Output Power 
    RETLW 0xEF     ;-- 1% Output Power
    RETLW 0xE8     ;-- 2% Output Power
    RETLW 0xE3     ;-- 3% Output Power
    RETLW 0xDF     ;-- 4% Output Power
    RETLW 0xDB     ;-- 5% Output Power
    RETLW 0xD7     ;-- 6% Output Power
    RETLW 0xD4     ;-- 7% Output Power
    RETLW 0xD1     ;-- 8% Output Power
    RETLW 0xCE     ;-- 9% Output Power
    RETLW 0xCB     ;-- 10% Output Power
    RETLW 0xC8     ;-- 11% Output Power
    RETLW 0xC6     ;-- 12% Output Power
    RETLW 0xC3     ;-- 13% Output Power
    RETLW 0xC1     ;-- 14% Output Power
    RETLW 0xBF     ;-- 15% Output Power
    RETLW 0xBD     ;-- 16% Output Power
    RETLW 0xBA     ;-- 17% Output Power
    RETLW 0xB8     ;-- 18% Output Power
    RETLW 0xB6     ;-- 19% Output Power
    RETLW 0xB4     ;-- 20% Output Power
    RETLW 0xB2     ;-- 21% Output Power
    RETLW 0xB0     ;-- 22% Output Power
    RETLW 0xAE     ;-- 23% Output Power
    RETLW 0xAC     ;-- 24% Output Power
    RETLW 0xAA     ;-- 25% Output Power
    RETLW 0xA9     ;-- 26% Output Power
    RETLW 0xA7     ;-- 27% Output Power
    RETLW 0xA5     ;-- 28% Output Power
    RETLW 0xA3     ;-- 29% Output Power
    RETLW 0xA1     ;-- 30% Output Power
    RETLW 0xA0     ;-- 31% Output Power
    RETLW 0x9E     ;-- 32% Output Power
    RETLW 0x9C     ;-- 33% Output Power
    RETLW 0x9A     ;-- 34% Output Power
    RETLW 0x99     ;-- 35% Output Power
    RETLW 0x97     ;-- 36% Output Power
    RETLW 0x95     ;-- 37% Output Power
    RETLW 0x94     ;-- 38% Output Power
    RETLW 0x92     ;-- 39% Output Power
    RETLW 0x90     ;-- 40% Output Power
    RETLW 0x8F     ;-- 41% Output Power
    RETLW 0x8D     ;-- 42% Output Power
    RETLW 0x8B     ;-- 43% Output Power
    RETLW 0x8A     ;-- 44% Output Power
    RETLW 0x88     ;-- 45% Output Power
    RETLW 0x86     ;-- 46% Output Power
    RETLW 0x85     ;-- 47% Output Power
    RETLW 0x83     ;-- 48% Output Power
    RETLW 0x82     ;-- 49% Output Power
    RETLW 0x80     ;-- 50% Output Power
    RETLW 0x7E     ;-- 51% Output Power
    RETLW 0x7D     ;-- 52% Output Power
    RETLW 0x7B     ;-- 53% Output Power
    RETLW 0x7A     ;-- 54% Output Power
    RETLW 0x78     ;-- 55% Output Power
    RETLW 0x76     ;-- 56% Output Power
    RETLW 0x75     ;-- 57% Output Power
    RETLW 0x73     ;-- 58% Output Power
    RETLW 0x71     ;-- 59% Output Power
    RETLW 0x70     ;-- 60% Output Power
    RETLW 0x6E     ;-- 61% Output Power
    RETLW 0x6C     ;-- 62% Output Power
    RETLW 0x6B     ;-- 63% Output Power
    RETLW 0x69     ;-- 64% Output Power
    RETLW 0x67     ;-- 65% Output Power
    RETLW 0x66     ;-- 66% Output Power
    RETLW 0x64     ;-- 67% Output Power
    RETLW 0x62     ;-- 68% Output Power
    RETLW 0x60     ;-- 69% Output Power
    RETLW 0x5F     ;-- 70% Output Power
    RETLW 0x5D     ;-- 71% Output Power
    RETLW 0x5B     ;-- 72% Output Power
    RETLW 0x59     ;-- 73% Output Power
    RETLW 0x57     ;-- 74% Output Power
    RETLW 0x56     ;-- 75% Output Power
    RETLW 0x54     ;-- 76% Output Power
    RETLW 0x52     ;-- 77% Output Power
    RETLW 0x50     ;-- 78% Output Power
    RETLW 0x4E     ;-- 79% Output Power
    RETLW 0x4C     ;-- 80% Output Power
    RETLW 0x4A     ;-- 81% Output Power
    RETLW 0x48     ;-- 82% Output Power
    RETLW 0x46     ;-- 83% Output Power
    RETLW 0x43     ;-- 84% Output Power
    RETLW 0x41     ;-- 85% Output Power
    RETLW 0x3F     ;-- 86% Output Power
    RETLW 0x3C     ;-- 87% Output Power
    RETLW 0x3A     ;-- 88% Output Power
    RETLW 0x37     ;-- 89% Output Power
    RETLW 0x35     ;-- 90% Output Power
    RETLW 0x32     ;-- 91% Output Power
    RETLW 0x2F     ;-- 92% Output Power
    RETLW 0x2C     ;-- 93% Output Power
    RETLW 0x29     ;-- 94% Output Power
    RETLW 0x25     ;-- 95% Output Power
    RETLW 0x21     ;-- 96% Output Power
    RETLW 0x1D     ;-- 97% Output Power
    RETLW 0x18     ;-- 98% Output Power
    RETLW 0x11     ;-- 99% Output Power
    RETLW 0x01     ;-- 100% Output Power


;************************** END OF PowerTable



    END