📄 lan91c111end.c
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pDrvCtrl->userNetAddr.Address[3],
pDrvCtrl->userNetAddr.Address[4],
pDrvCtrl->userNetAddr.Address[5])
parse_exit:
DRV_LOG (DRV_DEBUG_LOAD, "Processed all arugments\n", 1, 2, 3, 4, 5, 6);
return OK;
}
/*******************************************************************************
* lan91c111MemInit - initialize memory for the chip
*
* This routine is highly specific to the device.
*
* RETURNS: OK or ERROR.
*/
STATUS lan91c111MemInit
(
LAN91C111END_DEVICE * pDrvCtrl /* device to be initialized */
)
{
DRV_LOG (DRV_DEBUG_LOAD, "####################################################################lan91c111MemInit: called\n", 1, 2, 3, 4, 5, 6);
pDrvCtrl->numFrames = POOL_FRAME_NUMS;
/* Allocate space for the NET_POOL */
if ((pDrvCtrl->endObj.pNetPool = malloc (sizeof(NET_POOL))) == NULL)
return (ERROR);
/* Calculate the total memory for all the M-Blks and CL-Blks. */
lan91c111MclBlkConfig.mBlkNum = pDrvCtrl->numFrames*2;
lan91c111ClDescTbl[0].clNum = pDrvCtrl->numFrames;
lan91c111MclBlkConfig.clBlkNum = lan91c111ClDescTbl[0].clNum;
lan91c111MclBlkConfig.memSize = (lan91c111MclBlkConfig.mBlkNum *
(MSIZE + sizeof (long))) +
(lan91c111MclBlkConfig.clBlkNum *
(CL_BLK_SZ + sizeof(long)));
if ((lan91c111MclBlkConfig.memArea = (char *) memalign (sizeof(long),
lan91c111MclBlkConfig.memSize))
== NULL)
return (ERROR);
/* Calculate the memory size of all the clusters. */
lan91c111ClDescTbl[0].memSize = (lan91c111ClDescTbl[0].clNum *
(LAN91C111_BUFSIZE + 8)) + sizeof(int);
/* Allocate the memory for the clusters from cache safe memory. */
lan91c111ClDescTbl[0].memArea =
(char *) cacheDmaMalloc (lan91c111ClDescTbl[0].memSize);
DRV_LOG (DRV_DEBUG_LOAD, "lan91c111ClDescTbl[0].memArea: =0x%x lan91c111ClDescTbl[0].memSize=0x%x\n",
lan91c111ClDescTbl[0].memArea, lan91c111ClDescTbl[0].memSize, 3, 4, 5, 6);
if ((int)lan91c111ClDescTbl[0].memArea == NULL)
{
DRV_LOG (DRV_DEBUG_LOAD, "lan91c111MemInit: system memory unavailable\n",
1, 2, 3, 4, 5, 6);
return (ERROR);
}
/* Initialize the memory pool. */
if (netPoolInit(pDrvCtrl->endObj.pNetPool, &lan91c111MclBlkConfig,
&lan91c111ClDescTbl[0], lan91c111ClDescTblNumEnt,
NULL) == ERROR)
{
DRV_LOG (DRV_DEBUG_LOAD, "lan91c111MemInit: Could not init buffering\n",
1, 2, 3, 4, 5, 6);
return (ERROR);
}
/* Store a reference to the cluster pool */
if ((pDrvCtrl->pClPoolId = netClPoolIdGet (pDrvCtrl->endObj.pNetPool,
sizeof (TX_PKT), FALSE))
== NULL)
return (ERROR);
/*
* If you need clusters to store received packets into then get them
* here ahead of time.
*/
pDrvCtrl->pTxBase = (TX_PKT *)calloc(TX_PACKETS * sizeof(TX_PKT),1);
pDrvCtrl->pTxReadIndex = pDrvCtrl->pTxBase;
pDrvCtrl->pTxWriteIndex = pDrvCtrl->pTxBase;
pDrvCtrl->pRxBase = (RX_PKT *)calloc(RX_PACKETS * sizeof(RX_PKT),1);
pDrvCtrl->pRxReadIndex = pDrvCtrl->pRxBase;
pDrvCtrl->pRxWriteIndex = pDrvCtrl->pRxBase;
pDrvCtrl->sendBuf = (unsigned char *)calloc(2048, 1);
#if PING_DEBUG
debugTxBuf = pDrvCtrl->sendBuf;
#endif
DRV_LOG (DRV_DEBUG_LOAD, "lan91c111MemInit: Memory setup complete\n",
1, 2, 3, 4, 5, 6);
return OK;
}
/*******************************************************************************
* lan91c111Start - start the device
*
* This function calls BSP functions to connect interrupts and start the
* device running in interrupt mode.
*
* RETURNS: OK or ERROR
*
*/
STATUS lan91c111Start
(
END_OBJ * pEnd /* device ID */
)
{
LAN91C111END_DEVICE *pDrvCtrl = (LAN91C111END_DEVICE *)pEnd;
/*WritePhyRegister( pDrvCtrl->IOBase, 0, 19,0x3fc0 );*/
/*lnc911regSet(0,0xa,0x03c0);*/
lan91c111SetLed();
lnc911RcrSet(LAN91C111_RCR_ALMUL_SET);
SYS_INT_ENABLE (pDrvCtrl);
DRV_LOG(DRV_DEBUG_RX,"lan91c111Start: iLev = %x, iVector = %x\n", pDrvCtrl->ilevel, pDrvCtrl->ivec, 3,4,5,6);
return (OK);
}
/*******************************************************************************
* lan91c111Int - handle controller interrupt
*
* This routine is called at interrupt level in response to an interrupt from
* the controller.
*
* RETURNS: N/A.
*/
void lan91c111Int
(
LAN91C111END_DEVICE * pDrvCtrl /* device to be initialized */
)
{
LAN91C111END_DEVICE *Adapter = pDrvCtrl;
/*-----------------3/15/01 3:07PM-------------------
* Short Cut for Bank Select Values
* --------------------------------------------------*/
UINT IOBase;
UINT IntrPort;
UINT MmuPort;
UINT DataPort;
UINT RxFifoPort;
UINT PtrPort;
/*-----------------3/15/01 3:07PM-------------------
* s for saving Bank Select, Pack Num, Ptr Reg
* --------------------------------------------------*/
USHORT SavedBank;
USHORT SavedPtr;
USHORT SavedPnr;
USHORT tempWord;
UCHAR IntrSts, IntMask;
USHORT FifoPort;
USHORT Count;
/*-----------------3/15/01 3:06PM-------------------
* Used in Rx Interrupt Processing
* --------------------------------------------------*/
USHORT Pointer;
USHORT PacketStatus;
USHORT PacketRange;
int i;
UINT16 len;
char *usr_buf, *ReadBuffer, *pData;
RX_PKT *pRxWriteIndex_ahead;
/*-----------------3/15/01 3:06PM-------------------
* Used in Tx Interrupt Processing
* --------------------------------------------------*/
UCHAR PacketNumber;
/*-----------------3/15/01 3:13PM-------------------
* Used in EPH Interrupt Processing
* --------------------------------------------------*/
USHORT EphStatus;
/*-----------------3/15/01 3:11PM-------------------
* Used in MDINT
* --------------------------------------------------*/
USHORT DefaultVal;
DRV_LOG (DRV_DEBUG_INT, "----------- START ISR -------------\n",
1, 2, 3, 4, 5, 6);
/*-----------------3/16/01 4:40PM-------------------
* DisableInterrupt is not called in NT driver code.
* However it is done here because EnableInterrupt is
* called just before exit from this ISR
* --------------------------------------------------*/
/* lan91c111DisableInterrupt(pDrvCtrl);*/
IOBase = Adapter->IOBase;
IntrPort = IOBase + BANK2_INT_STS;
MmuPort = IOBase;
DataPort = IOBase + BANK2_DATA1;
RxFifoPort = IOBase + BANK2_RX_FIFO;
PtrPort = IOBase + BANK2_PTR;
/* read original Bank Select so it can be restored later */
SYS_IN_SHORT (IOBase + BANK_SELECT, (USHORT *) &SavedBank);
SYS_OUT_SHORT(IOBase + BANK_SELECT, (USHORT) 2);
/* read original Pointer register so it can be restored later */
SYS_IN_SHORT (IOBase + BANK2_PTR, (USHORT *) &SavedPtr);
SYS_IN_SHORT (IOBase + BANK2_PNR, (USHORT *) &SavedPnr);
while(1)
{
SYS_IN_SHORT( IntrPort, &tempWord);
IntrSts = LOBYTE(tempWord);
IntMask = HIBYTE(tempWord);
IntrSts &=IntMask;
if(!IntrSts)
{
DRV_LOG (DRV_DEBUG_INT, "lan91c111Int: Got weird status %x\n",
IntrSts, 2, 3, 4, 5, 6);
tempWord = tempWord & ( 0xff00 | ~IntMask);
SYS_OUT_SHORT(IntrPort, tempWord);
goto lan91c111IntExit;
}
/* Check to see if there is something to recieve */
DRV_LOG (DRV_DEBUG_INT, "lan91c111Int: IntrSts = %x\n",IntrSts, 2, 3, 4, 5, 6);
if(IntrSts & INT_EARLY_RX)
{
sysOutByte(IOBase + BANK2_INT_STS, INT_EARLY_RX);lan91c111Delay();
DRV_LOG (DRV_DEBUG_INT, "lan91c111Int: Early Receive",1, 2, 3, 4, 5, 6);
}
else if(IntrSts & INT_RX_CMP)/* start : RX_INT */
{
DRV_LOG(DRV_DEBUG_RX,"*************start rx int *************\n",1,2,3,4,5,6);
DRV_LOG (DRV_DEBUG_INT, " RX \n",1, 2, 3, 4, 5, 6);
SYS_IN_SHORT(IOBase + BANK2_FIFOS, &FifoPort);
while(!(FifoPort & FIFO_RX_EMPTY))
{
SYS_OUT_SHORT(PtrPort, (USHORT) (PTR_RCV | PTR_AUTO | PTR_READ));
Count = PTR_WAIT;
while(Count--)
SYS_IN_SHORT(PtrPort, (PUSHORT) &Pointer);
SYS_IN_SHORT(DataPort, (USHORT *) &PacketStatus);
SYS_IN_SHORT(DataPort, (USHORT *) &PacketRange);
DRV_LOG(DRV_DEBUG_RX," packetRange = %xPacketStatus = %x\n",PacketRange,PacketStatus,3,4,5,6);
PacketRange &= 0x7ff;
if(PacketStatus & RFS_LONG)
{
if((PacketRange - FRAME_OVERHEAD) <= MAX_FRAME_SIZE)
{
PacketStatus &= ~RFS_LONG;
}
else
{
DRV_LOG (DRV_DEBUG_ERR, "\nlan91c111Int: invalid length received\n",
1, 2, 3, 4, 5, 6);
END_ERR_ADD (&pDrvCtrl->endObj, MIB2_IN_ERRS, +1);
SYS_IN_SHORT(IOBase + BANK2_FIFOS, &FifoPort);
continue;
}
}
/* compute pRxWriteIndex_ahead to make sure there is room
* to queue packet
*/
if(pDrvCtrl->pRxWriteIndex < pDrvCtrl->pRxBase + RX_PACKETS - 1)
{
pRxWriteIndex_ahead = pDrvCtrl->pRxWriteIndex + 1;
DRV_LOG (DRV_DEBUG_RX, "\nlan91c111Int:pRxWriteIndex_ahead = pDrvCtrl->pRxWriteIndex + 1;\n",1,2,3,4,5,6);
}
else
{
pRxWriteIndex_ahead = pDrvCtrl->pRxBase;
DRV_LOG (DRV_DEBUG_RX, "\nlan91c111Int:pRxWriteIndex_ahead = pDrvCtrl->pRxBase;;\n",1,2,3,4,5,6);
}
if(pRxWriteIndex_ahead == pDrvCtrl->pRxReadIndex )
DRV_LOG (DRV_DEBUG_RX, "\nqueue full ;\n",1,2,3,4,5,6);
if ((PacketStatus & RFS_ERROR) /* packet error */ ||
pRxWriteIndex_ahead == pDrvCtrl->pRxReadIndex /* queue full */)
{
DRV_LOG (DRV_DEBUG_RX, "\nlan91c111Int: packet error || queue full\n",1,2,3,4,5,6);
if(PacketStatus & RFS_ALIGN)
;
if(PacketStatus & RFS_CRC)
;
SYS_OUT_SHORT(MmuPort, (USHORT) CMD_REM_REL_TOP);
do
{
SYS_IN_SHORT(MmuPort, (PUSHORT) &tempWord);
} while (tempWord & MMUCMD_BUSY);
DRV_LOG (DRV_DEBUG_ERR, "\nlan91c111Int: Alignment Err or CRC Err received\n",
1, 2, 3, 4, 5, 6);
END_ERR_ADD (&pDrvCtrl->endObj, MIB2_IN_ERRS, +1);
SYS_IN_SHORT(IOBase + BANK2_FIFOS, &FifoPort);
continue;
}
PacketRange -= FRAME_OVERHEAD;
/* => Pramod, Odd Byte, RevB */
if ((9 == Adapter->ChipID) && (1 == Adapter->ChipRev))
{
if (PacketStatus & RFS_ODD)
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