bcd_7seg.vhd

来自「this program will give the functionality」· VHDL 代码 · 共 56 行

--bcd to seven segment decoder
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

--en1,2,3,4 are 7 seg enable signals
--sel is the switch i/p
--count is the 4 bit switch i/p
--dis_out connects to 7 seg display lines
entity bcd_7seg is
    Port ( en1 : out std_logic;
           en2 : out std_logic;
           en3 : out std_logic;
           en4 : out std_logic;
         count : in std_logic_vector(3 downto 0);
       dis_out : out std_logic_vector(7 downto 0));
end bcd_7seg;

architecture Behavioral of bcd_7seg is
begin
--if sel =1 then enable 1st display
	--if sel = '1' then	  
		en1 <='0';
 --disable all other displays
		en2 <= '1';			
		en3 <= '1';
		en4 <= '1';
	--else
--if sel=0 then enable 2 nd display					     
		--en1 <= '1';
		--en2 <= '0';
	--end if;
--end process;

	---	 to display on 7 seg display
 dis_out<= "11111001" when count="0001" else   --1
           "10100100" when count="0010" else   --2
         	 "10110000" when count="0011" else   --3
         	 "10011001" when count="0100" else   --4
         	 "10010010" when count="0101" else   --5
         	 "10000010" when count="0110" else   --6
         	 "11111000" when count="0111" else   --7
         	 "10000000" when count="1000" else   --8
         	 "10010000" when count="1001" else   --9
         	 "10001000" when count="1010" else   --A
         	 "10000011" when count="1011" else   --b
         	 "11000110" when count="1100" else   --C
         	 "10100001" when count="1101" else   --d
         	 "10000110" when count="1110" else   --E
         	 "10001110" when count="1111" else   --F
         	 "11000000" ;   --0
	

end Behavioral;