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📄 dvd100k.par

📁 this program give the functionality bcd count
💻 PAR
字号:
Release 6.3i Par G.35Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.P4::  Wed Jun 08 19:11:24 2005E:/Xilinx/bin/nt/par.exe -w -intstyle ise -ol std -t 1 dvd100k_map.ncd
dvd100k.ncd dvd100k.pcf Constraints file: dvd100k.pcfLoading device database for application Par from file "dvd100k_map.ncd".   "dvd100k" is an NCD, version 2.38, device xc3s50, package pq208, speed -5Loading device for application Par from file '3s50.nph' in environment
E:/Xilinx.Device speed data version:  ADVANCED 1.32 2004-06-25.Resolved that IOB <clkin> must be placed at site P79.Resolved that IOB <clkout> must be placed at site P20.Device utilization summary:   Number of External IOBs             2 out of 124     1%      Number of LOCed External IOBs    2 out of 2     100%   Number of Slices                   15 out of 768     1%   Number of BUFGMUXs                  1 out of 8      12%Overall effort level (-ol):   Standard (set by user)Placer effort level (-pl):    Standard (set by user)Placer cost table entry (-t): 1Router effort level (-rl):    Standard (set by user)Phase 1.1Phase 1.1 (Checksum:98969d) REAL time: 0 secs .Phase 3.8.Phase 3.8 (Checksum:989e95) REAL time: 0 secs Phase 4.5Phase 4.5 (Checksum:26259fc) REAL time: 0 secs Phase 5.18Phase 5.18 (Checksum:2faf07b) REAL time: 0 secs Writing design to file dvd100k.ncd.Total REAL time to Placer completion: 0 secs Total CPU time to Placer completion: 1 secs Phase 1: 73 unrouted;       REAL time: 0 secs Phase 2: 61 unrouted;       REAL time: 0 secs Phase 3: 3 unrouted;       REAL time: 0 secs Phase 4: 0 unrouted;       REAL time: 0 secs Total REAL time to Router completion: 0 secs Total CPU time to Router completion: 1 secs Generating "par" statistics.**************************Generating Clock Report**************************+-------------------------+----------+------+------+------------+-------------+|        Clock Net        | Resource |Locked|Fanout|Net Skew(ns)|Max Delay(ns)|+-------------------------+----------+------+------+------------+-------------+|       clkin_BUFGP       |  BUFGMUX0| No   |   11 |  0.000     |  0.868      |+-------------------------+----------+------+------+------------+-------------+   The Delay Summary Report   The SCORE FOR THIS DESIGN is: 65The NUMBER OF SIGNALS NOT COMPLETELY ROUTED for this design is: 0   The AVERAGE CONNECTION DELAY for this design is:        0.525   The MAXIMUM PIN DELAY IS:                               2.142   The AVERAGE CONNECTION DELAY on the 10 WORST NETS is:   0.631   Listing Pin Delays by value: (nsec)    d < 1.00   < d < 2.00  < d < 3.00  < d < 4.00  < d < 5.00  d >= 5.00   ---------   ---------   ---------   ---------   ---------   ---------          70           2           1           0           0           0Generating Pad Report.All signals are completely routed.Total REAL time to PAR completion: 2 secs Total CPU time to PAR completion: 1 secs Peak Memory Usage:  50 MBPlacement: Completed - No errors found.Routing: Completed - No errors found.Writing design to file dvd100k.ncd.PAR done.

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