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📄 bit_add_map.nlf

📁 this programs gives the fuctionality of 1 bit adder
💻 NLF
字号:
Release 6.3i - netgen G.35Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.Loading device database for application netgen from file "bit_add_map.ncd".   "bit_add" is an NCD, version 2.38, device xc3s50, package pq208, speed -4Loading device for application netgen from file '3s50.nph' in environment
E:/Xilinx.Loading constraints from file "bit_add.pcf"...WARNING:Anno:28 - This .ncd is not completely routed; therefore, some delay
   calculations may be inaccurate.  Flattening design ...  Flattening design completed.  Specializing design ...  Specializing design completed.  Preping physical only global signals ...  Preping design's networks ...  Preping design's macros ...Writing VHDL netlist bit_add_map.vhd ...Writing VHDL SDF file bit_add_map.sdf ...Total memory usage is 53612 kilobytes

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