lcd_1602.map.qmsg

液晶1602驱动并显示

{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 lcd.v(121) " "Warning (10230): Verilog HDL assignment warning at lcd.v(121): truncated value with size 32 to match size of target (4)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 121 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(133) " "Warning (10230): Verilog HDL assignment warning at lcd.v(133): truncated value with size 32 to match size of target (1)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 133 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(137) " "Warning (10230): Verilog HDL assignment warning at lcd.v(137): truncated value with size 32 to match size of target (1)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 137 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(139) " "Warning (10230): Verilog HDL assignment warning at lcd.v(139): truncated value with size 32 to match size of target (1)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 139 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 lcd.v(141) " "Warning (10230): Verilog HDL assignment warning at lcd.v(141): truncated value with size 32 to match size of target (1)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 141 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 lcd.v(160) " "Warning (10230): Verilog HDL assignment warning at lcd.v(160): truncated value with size 32 to match size of target (6)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 160 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 lcd.v(161) " "Warning (10230): Verilog HDL assignment warning at lcd.v(161): truncated value with size 32 to match size of target (7)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 161 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 lcd.v(167) " "Warning (10230): Verilog HDL assignment warning at lcd.v(167): truncated value with size 32 to match size of target (7)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 167 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 lcd.v(171) " "Warning (10230): Verilog HDL assignment warning at lcd.v(171): truncated value with size 32 to match size of target (6)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 171 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 lcd.v(172) " "Warning (10230): Verilog HDL assignment warning at lcd.v(172): truncated value with size 32 to match size of target (7)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 172 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "7 6 lcd.v(177) " "Warning (10230): Verilog HDL assignment warning at lcd.v(177): truncated value with size 7 to match size of target (6)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 177 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 lcd.v(178) " "Warning (10230): Verilog HDL assignment warning at lcd.v(178): truncated value with size 32 to match size of target (7)" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 178 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "char_ram lcd:inst\|char_ram:charram " "Info: Elaborating entity \"char_ram\" for hierarchy \"lcd:inst\|char_ram:charram\"" {  } { { "lcd.v" "charram" { Text "D:/lcd_1602/lcd.v" 190 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|lcd_1602\|lcd:inst\|state 11 " "Info: State machine \"\|lcd_1602\|lcd:inst\|state\" contains 11 states" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|lcd_1602\|lcd:inst\|state " "Info: Selected Auto state machine encoding method for state machine \"\|lcd_1602\|lcd:inst\|state\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|lcd_1602\|lcd:inst\|state " "Info: Encoding result for state machine \"\|lcd_1602\|lcd:inst\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "11 " "Info: Completed encoding using 11 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.SETDDRAM2 " "Info: Encoded state bit \"lcd:inst\|state.SETDDRAM2\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.SETDDRAM1 " "Info: Encoded state bit \"lcd:inst\|state.SETDDRAM1\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.SETCGRAM " "Info: Encoded state bit \"lcd:inst\|state.SETCGRAM\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.IDLE " "Info: Encoded state bit \"lcd:inst\|state.IDLE\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.WRITERAM " "Info: Encoded state bit \"lcd:inst\|state.WRITERAM\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.SETFUNCTION " "Info: Encoded state bit \"lcd:inst\|state.SETFUNCTION\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.SHIFT " "Info: Encoded state bit \"lcd:inst\|state.SHIFT\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.SWITCHMODE " "Info: Encoded state bit \"lcd:inst\|state.SWITCHMODE\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.SETMODE " "Info: Encoded state bit \"lcd:inst\|state.SETMODE\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.RETURNCURSOR " "Info: Encoded state bit \"lcd:inst\|state.RETURNCURSOR\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst\|state.CLEAR " "Info: Encoded state bit \"lcd:inst\|state.CLEAR\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.IDLE 00000000000 " "Info: State \"\|lcd_1602\|lcd:inst\|state.IDLE\" uses code string \"00000000000\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.SETCGRAM 00110000000 " "Info: State \"\|lcd_1602\|lcd:inst\|state.SETCGRAM\" uses code string \"00110000000\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.SWITCHMODE 00010001000 " "Info: State \"\|lcd_1602\|lcd:inst\|state.SWITCHMODE\" uses code string \"00010001000\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.RETURNCURSOR 00010000010 " "Info: State \"\|lcd_1602\|lcd:inst\|state.RETURNCURSOR\" uses code string \"00010000010\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.WRITERAM 00011000000 " "Info: State \"\|lcd_1602\|lcd:inst\|state.WRITERAM\" uses code string \"00011000000\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.SETDDRAM1 01010000000 " "Info: State \"\|lcd_1602\|lcd:inst\|state.SETDDRAM1\" uses code string \"01010000000\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.CLEAR 00010000001 " "Info: State \"\|lcd_1602\|lcd:inst\|state.CLEAR\" uses code string \"00010000001\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.SETMODE 00010000100 " "Info: State \"\|lcd_1602\|lcd:inst\|state.SETMODE\" uses code string \"00010000100\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.SHIFT 00010010000 " "Info: State \"\|lcd_1602\|lcd:inst\|state.SHIFT\" uses code string \"00010010000\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.SETFUNCTION 00010100000 " "Info: State \"\|lcd_1602\|lcd:inst\|state.SETFUNCTION\" uses code string \"00010100000\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_1602\|lcd:inst\|state.SETDDRAM2 10010000000 " "Info: State \"\|lcd_1602\|lcd:inst\|state.SETDDRAM2\" uses code string \"10010000000\"" {  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "lcd.v" "" { Text "D:/lcd_1602/lcd.v" 9 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "149 " "Info: Implemented 149 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "11 " "Info: Implemented 11 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "136 " "Info: Implemented 136 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 24 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 24 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Nov 23 21:27:27 2006 " "Info: Processing ended: Thu Nov 23 21:27:27 2006" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:16 " "Info: Elapsed time: 00:00:16" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}