lcd_1602.fit.rpt

液晶1602驱动并显示

; Number of Signals Sourced  (Average = 7.56) ; Number of LABs  (Total = 18) ;
+---------------------------------------------+------------------------------+
; 0                                           ; 0                            ;
; 1                                           ; 3                            ;
; 2                                           ; 0                            ;
; 3                                           ; 0                            ;
; 4                                           ; 1                            ;
; 5                                           ; 0                            ;
; 6                                           ; 0                            ;
; 7                                           ; 2                            ;
; 8                                           ; 2                            ;
; 9                                           ; 2                            ;
; 10                                          ; 7                            ;
; 11                                          ; 1                            ;
+---------------------------------------------+------------------------------+


+--------------------------------------------------------------------------------+
; LAB Signals Sourced Out                                                        ;
+-------------------------------------------------+------------------------------+
; Number of Signals Sourced Out  (Average = 4.83) ; Number of LABs  (Total = 18) ;
+-------------------------------------------------+------------------------------+
; 0                                               ; 0                            ;
; 1                                               ; 3                            ;
; 2                                               ; 2                            ;
; 3                                               ; 2                            ;
; 4                                               ; 2                            ;
; 5                                               ; 3                            ;
; 6                                               ; 1                            ;
; 7                                               ; 1                            ;
; 8                                               ; 1                            ;
; 9                                               ; 0                            ;
; 10                                              ; 3                            ;
+-------------------------------------------------+------------------------------+


+-----------------------------------------------------------------------------+
; LAB Distinct Inputs                                                         ;
+----------------------------------------------+------------------------------+
; Number of Distinct Inputs  (Average = 10.56) ; Number of LABs  (Total = 18) ;
+----------------------------------------------+------------------------------+
; 0                                            ; 0                            ;
; 1                                            ; 0                            ;
; 2                                            ; 1                            ;
; 3                                            ; 2                            ;
; 4                                            ; 1                            ;
; 5                                            ; 1                            ;
; 6                                            ; 0                            ;
; 7                                            ; 0                            ;
; 8                                            ; 2                            ;
; 9                                            ; 0                            ;
; 10                                           ; 0                            ;
; 11                                           ; 1                            ;
; 12                                           ; 2                            ;
; 13                                           ; 2                            ;
; 14                                           ; 1                            ;
; 15                                           ; 2                            ;
; 16                                           ; 2                            ;
; 17                                           ; 0                            ;
; 18                                           ; 0                            ;
; 19                                           ; 0                            ;
; 20                                           ; 1                            ;
+----------------------------------------------+------------------------------+


+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Full Version
    Info: Processing started: Thu Nov 23 21:27:33 2006
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off lcd_1602 -c lcd_1602
Info: Selected device EPM1270T144C5 for design "lcd_1602"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
    Info: Device EPM570T144C5 is compatible
    Info: Device EPM570T144I5 is compatible
    Info: Device EPM1270T144I5 is compatible
    Info: Device EPM1270T144C5ES is compatible
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
    Info: Assuming a global fmax requirement of 1000 MHz
    Info: Assuming a global tsu requirement of 2.0 ns
    Info: Assuming a global tco requirement of 1.0 ns
    Info: Assuming a global tpd requirement of 1.0 ns
Info: Performing register packing on registers with non-logic cell location assignments
Info: Completed register packing on registers with non-logic cell location assignments
Info: Completed User Assigned Global Signals Promotion Operation
Info: Automatically promoted signal "clk" to use Global clock in PIN 18
Info: Automatically promoted some destinations of signal "lcd:inst|clk_int" to use Global clock
    Info: Destination "lcd:inst|clk_int" may be non-global or may not use global clock
Info: Automatically promoted some destinations of signal "lcd:inst|clkdiv" to use Global clock
    Info: Destination "lcd:inst|clkdiv" may be non-global or may not use global clock
Info: Automatically promoted some destinations of signal "reset" to use Global clock
    Info: Destination "lcd:inst|lcd_rs" may be non-global or may not use global clock
    Info: Destination "lcd:inst|data[7]" may be non-global or may not use global clock
    Info: Destination "lcd:inst|data[6]" may be non-global or may not use global clock
    Info: Destination "lcd:inst|data[5]" may be non-global or may not use global clock
    Info: Destination "lcd:inst|data[4]" may be non-global or may not use global clock
    Info: Destination "lcd:inst|data[3]" may be non-global or may not use global clock
    Info: Destination "lcd:inst|data[2]" may be non-global or may not use global clock
    Info: Destination "lcd:inst|data[1]" may be non-global or may not use global clock
    Info: Destination "lcd:inst|data[0]" may be non-global or may not use global clock
    Info: Destination "lcd:inst|lcd_rw" may be non-global or may not use global clock
    Info: Limited to 10 non-global destinations
Info: Pin "reset" drives global clock, but is not placed in a dedicated clock pin position
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Moving registers into LUTs to improve timing and density
Info: Started processing fast register assignments
Info: Finished processing fast register assignments
Info: Finished moving registers into LUTs
Info: Finished register packing
Warning: Ignored locations or region assignments to the following nodes
    Warning: Node "led[0]" is assigned to location or region, but does not exist in design
    Warning: Node "led[1]" is assigned to location or region, but does not exist in design
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:01
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Fitter placement operations ending: elapsed time is 00:00:06
Info: Estimated most critical path is register to pin delay of 4.156 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X6_Y9; Fanout = 2; REG Node = 'lcd:inst|data[6]'
    Info: 2: + IC(1.834 ns) + CELL(2.322 ns) = 4.156 ns; Loc. = PIN_133; Fanout = 0; PIN Node = 'lcd_data[6]'
    Info: Total cell delay = 2.322 ns ( 55.87 % )
    Info: Total interconnect delay = 1.834 ns ( 44.13 % )
Info: Fitter routing operations beginning
Info: Average interconnect usage is 2% of the available device resources. Peak interconnect usage is 4%
Info: Fitter routing operations ending: elapsed time is 00:00:02
Info: The Fitter performed an Auto Fit compilation.  No optimizations were skipped because the design's timing and routability requirements required full optimization.
Info: Quartus II Fitter was successful. 0 errors, 3 warnings
    Info: Processing ended: Thu Nov 23 21:27:50 2006
    Info: Elapsed time: 00:00:18