uart_lcd.fit.qmsg

结合了SOPC的精髓的串口通信程序实现功能很好

{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Warning" "WDAT_PRELIMINARY_TIMING" "EP2C8Q208C8 " "Warning: Timing characteristics of device EP2C8Q208C8 are preliminary" {  } {  } 0 0 "Timing characteristics of device %1!s! are preliminary" 0 0}
{ "Warning" "WDAT_NO_LOADING_SPECIFIED_ONE_OR_MORE_PINS" "11 " "Warning: Found 11 output pins without output pin load capacitance assignment" { { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "RS 0 " "Warning: Pin \"RS\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "RW 0 " "Warning: Pin \"RW\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "EN 0 " "Warning: Pin \"EN\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "D\[7\] 0 " "Warning: Pin \"D\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "D\[6\] 0 " "Warning: Pin \"D\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "D\[5\] 0 " "Warning: Pin \"D\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "D\[4\] 0 " "Warning: Pin \"D\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "D\[3\] 0 " "Warning: Pin \"D\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "D\[2\] 0 " "Warning: Pin \"D\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "D\[1\] 0 " "Warning: Pin \"D\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "D\[0\] 0 " "Warning: Pin \"D\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0}  } {  } 0 0 "Found %1!d! output pins without output pin load capacitance assignment" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Warning" "WFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "1 " "Warning: Following 1 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "RW GND " "Info: Pin RW has GND driving its datain port" {  } { { "uart_lcd.bdf" "" { Schematic "E:/myproject/uart_lcd/uart_lcd.bdf" { { 152 848 1024 168 "RW" "" } } } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "RW" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "uart_lcd" "UNKNOWN" "V1" "E:/myproject/uart_lcd/db/uart_lcd.quartus_db" { Floorplan "E:/myproject/uart_lcd/" "" "" { RW } "NODE_NAME" } "" } } { "E:/myproject/uart_lcd/uart_lcd.fld" "" { Floorplan "E:/myproject/uart_lcd/uart_lcd.fld" "" "" { RW } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0}  } {  } 0 0 "Following %1!d! pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 14 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 14 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Dec 04 22:54:34 2007 " "Info: Processing ended: Tue Dec 04 22:54:34 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Info: Elapsed time: 00:00:10" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}