_primary.vhd

基于Fusion系列AFS600的FPGA的51核

library verilog;
use verilog.vl_types.all;
entity CORE8051 is
    generic(
        USE_OCI         : integer := 0;
        USE_UJTAG       : integer := 0;
        TRACE_DEPTH     : integer := 0;
        TRIG_NUM        : integer := 0;
        NRSTOUT         : integer := 0;
        EN_FF_OPTS      : integer := 0
    );
    port(
        port0i          : in     vl_logic_vector(7 downto 0);
        port1i          : in     vl_logic_vector(7 downto 0);
        port2i          : in     vl_logic_vector(7 downto 0);
        port3i          : in     vl_logic_vector(7 downto 0);
        port0o          : out    vl_logic_vector(7 downto 0);
        port1o          : out    vl_logic_vector(7 downto 0);
        port2o          : out    vl_logic_vector(7 downto 0);
        port3o          : out    vl_logic_vector(7 downto 0);
        memdatai        : in     vl_logic_vector(7 downto 0);
        memdatao        : out    vl_logic_vector(7 downto 0);
        memaddr         : out    vl_logic_vector(15 downto 0);
        ramdatai        : in     vl_logic_vector(7 downto 0);
        ramdatao        : out    vl_logic_vector(7 downto 0);
        ramaddr         : out    vl_logic_vector(7 downto 0);
        sfrdatai        : in     vl_logic_vector(7 downto 0);
        sfrdatao        : out    vl_logic_vector(7 downto 0);
        sfraddr         : out    vl_logic_vector(6 downto 0);
        membank         : in     vl_logic_vector(3 downto 0);
        TraceA          : out    vl_logic_vector(7 downto 0);
        TraceDI         : out    vl_logic_vector(19 downto 0);
        TraceDO         : in     vl_logic_vector(19 downto 0);
        nreset          : in     vl_logic;
        clk             : in     vl_logic;
        clkcpu          : in     vl_logic;
        clkper          : in     vl_logic;
        int0            : in     vl_logic;
        int1            : in     vl_logic;
        int0a           : in     vl_logic;
        int1a           : in     vl_logic;
        int2            : in     vl_logic;
        int3            : in     vl_logic;
        int4            : in     vl_logic;
        int5            : in     vl_logic;
        int6            : in     vl_logic;
        int7            : in     vl_logic;
        rxd0i           : in     vl_logic;
        t0              : in     vl_logic;
        t1              : in     vl_logic;
        nrsto           : out    vl_logic;
        nrsto_nc        : out    vl_logic;
        clkcpu_en       : out    vl_logic;
        clkper_en       : out    vl_logic;
        movx            : out    vl_logic;
        rxd0o           : out    vl_logic;
        txd0            : out    vl_logic;
        mempsacki       : in     vl_logic;
        memacki         : in     vl_logic;
        mempsacko       : out    vl_logic;
        mempsrd         : out    vl_logic;
        memwr           : out    vl_logic;
        memrd           : out    vl_logic;
        ramwe           : out    vl_logic;
        ramoe           : out    vl_logic;
        sfrwe           : out    vl_logic;
        sfroe           : out    vl_logic;
        TCK             : in     vl_logic;
        TMS             : in     vl_logic;
        TDI             : in     vl_logic;
        TDO             : out    vl_logic;
        TRSTB           : in     vl_logic;
        BreakIn         : in     vl_logic;
        BreakOut        : out    vl_logic;
        dbgmempswr      : out    vl_logic;
        TrigOut         : out    vl_logic;
        AuxOut          : out    vl_logic;
        TraceWr         : out    vl_logic
    );
end CORE8051;