_primary.vhd

基于Fusion系列AFS600的FPGA的51核

library verilog;
use verilog.vl_types.all;
entity XYXX0006 is
    port(
        ramaddr         : in     vl_logic_vector(2 downto 1);
        MXXXXXXXXXXXXXXFXXXXXXXXXXXX0: in     vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXXX: in     vl_logic;
        MXXXXXXXXXXXXXXXXXPXWXXXXWXXXXX: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXXXXXX: in     vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXX1: in     vl_logic;
        XFXXXXXXXXXXX0  : in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXX11: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXX19: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXX66: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXX1: in     vl_logic;
        MXXXXXXXXXXXXXXYXX1: in     vl_logic;
        MXXXXXXXXXXXXXXYXXXX2: in     vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXX5: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXXXX5: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXX1: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXX4: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXX0: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXX3: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXX: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXX2: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXXXX4: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXXXX1: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXXXX3: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXXXX0: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXXXX2: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXVXXXXXXX: out    vl_logic;
        MXXXXXXXXXXXXXXXXPXXXXXXXXXX: out    vl_logic;
        MXXXXXXXXXXXXXXFX0: in     vl_logic;
        MXXXXXXXXXXXXXXFX: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXXXXXVXXXXXXXXXX10: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXX25: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXLXXX1: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXLXXX: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXLXXX0: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXXXXXXXX0: out    vl_logic;
        MXXXXXXXXXXXXXXXX7: in     vl_logic;
        MXXXXXXXXXXXXXXXX6: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX0: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX1: out    vl_logic;
        MXXXXXXXXXXXXXXXXXX20: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXXX1: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXMXXX: out    vl_logic;
        MXXXXXXXXXXXXXXXXXX21: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXX7: in     vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXX5: in     vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXX4: in     vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXX6: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXX116: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXX115: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXFXXXXX0: in     vl_logic;
        MXXXXXXXXXXXXXXXXXMXFXXXXLXXFXWXXXXXX: in     vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXX3: in     vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXX: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXFXXXXX: out    vl_logic;
        MXXXXXXXXXXXXXXXXXPXWXXXXWXXX: out    vl_logic;
        MXXXXXXXXXXXXXXXX4: in     vl_logic;
        MXXXXXXXXXXXXXXXX5: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXXX34: in     vl_logic;
        XYXX0006_GND    : in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXX23: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXXXXX23: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXX22: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXX21: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXX20: out    vl_logic;
        MXXXXXXXXXXXXXXXXXFXXXHXXX: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXLX: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXX8: in     vl_logic;
        MXXXXXXXXXXXXXXXL: out    vl_logic;
        MXXXXXXXXXXXXXXXXXX23: out    vl_logic;
        MXXXXXXXXXXXXXXXXXX22: out    vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXX10: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXXX39: in     vl_logic;
        MXXXXXXXXXXXXXXXXVXXXXXX3: out    vl_logic;
        MXXXXXXXXXXXXXXXXVXXXXXX2: out    vl_logic;
        MXXXXXXXXXXXXXXXXVXXXXXX1: out    vl_logic;
        MXXXXXXXXXXXXXXXXVXXXXXX0: out    vl_logic;
        MXXXXXXXXXXXXXXXXXFXXXHX: in     vl_logic;
        MXXXXXXXXXXXXXXXXVXXXXXX: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXXX42: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXXX0: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXXX41: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXXX40: out    vl_logic;
        MXXXXXXXXXXXXXXXXPXXXXXXXX2: out    vl_logic;
        XFXXXXXXXXXXX   : in     vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXX11: in     vl_logic;
        MXXXXXXXXXXXXXXXXPXXXXXXXX1: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXXX38: in     vl_logic;
        MXXXXXXXXXXXXXXFXXXXXXXXXXX0: in     vl_logic;
        MXXXXXXXXXXXXXXXXPXXXXXXXX0: out    vl_logic;
        MXXXXXXXXXXXXXXXXPXXXXXXXX: out    vl_logic;
        MXXXXXXXXXXXXXXXXXXXXX37: in     vl_logic;
        MXXXXXXXXXXXXXXXXXMXFXXXXLXXFXXXXXXXXXXX: in     vl_logic;
        XXX5            : in     vl_logic;
        MXXXXXXXXXXXXXXXXXMXFXXXXLXXFXXXXXXXXXXVXXX4: in     vl_logic;
        MXXXXXXXXXXXXXXXXXMXFXXXXLXXFXXXXXXXXXXVXXX3: in     vl_logic;
        MXXXXXXXXXXXXXXXXXMXFXXXXLXXFXXXXXXXXXXVXXX2: in     vl_logic;
        MXXXXXXXXXXXXXXXXXMXFXXXXLXXFXXXXXXXXXXVXXX1: in     vl_logic;
        MXXXXXXXXXXXXXXXXXMXFXXXXLXXFXXXXXXXXXXVXXX0: in     vl_logic;
        MXXXXXXXXXXXXXXXXXMXFXXXXLXXFXXXXXXXXXXVXXX: in     vl_logic;
        MXXXXXXXXXXXXXXXXXXXXX36: in     vl_logic;
        mcuclk          : in     vl_logic
    );
end XYXX0006;