opclasses.h

GNU binutils是GNU交叉工具链中的一个源码包

/* Opcode infix
   B  condition              16--20   U,C,Z,LO,HI, etc.
   C  condition              23--27   U,C,Z,LO,HI, etc.

   Arguments
   ,  required arg follows
   ;  optional arg follows

   Argument types             bits    [classes] - example
   -----------------------------------------------------------
   *  indirect (all)          0--15   [A,AB,AU,AF,A2,A3,A6,A7,AY,B,BA,BB,BI,B6,B7] - *+AR0(5), *++AR0(IR0)
   #  direct (for LDP)        0--15   [Z] - @start, start
   @  direct                  0--15   [A,AB,AU,AF,A3,A6,A7,AY,B,BA,BB,BI,B6,B7] - @start, start
   A  address register       22--24   [D] - AR0, AR7
   B  unsigned integer        0--23   [I,I2] - @start, start  (absolute on C3x, relative on C4x)
   C  indirect (disp - C4x)   0--7    [S,SC,S2,T,TC,T2,T2C] - *+AR0(5)
   E  register (all)          0--7    [T,TC,T2,T2C] - R0, R7, R11, AR0, DP
   e  register (0-11)         0--7    [S,SC,S2] - R0, R7, R11
   F  short float immediate   0--15   [AF,B,BA,BB] - 3.5, 0e-3.5e-1
   G  register (all)          8--15   [T,TC,T2,T2C] - R0, R7, R11, AR0, DP
   g  register (0-11)         0--7    [S,SC,S2] - R0, R7, R11
   H  register (0-7)         18--16   [LS,M,P,Q] - R0, R7
   I  indirect (no disp)      0--7    [S,SC,S2,T,TC,T2,T2C] - *+AR0(1), *+AR0(IR0)
   i  indirect (enhanced)     0--7    [LL,LS,M,P,Q,QC] - *+AR0(1), R5
   J  indirect (no disp)      8--15   [LL,LS,P,Q,QC,S,SC,S2,T,TC,T2,T2C] - *+AR0(1), *+AR0(IR0)
   j  indirect (enhanced)     8--15   [M] - *+AR0(1), R5
   K  register               19--21   [LL,M,Q,QC] - R0, R7
   L  register               22--24   [LL,LS,P,Q,QC] - R0, R7
   M  register (R2,R3)       22--22   [M] R2, R3
   N  register (R0,R1)       23--23   [M] R0, R1
   O  indirect(disp - C4x)    8--15   [S,SC,S2,T,TC,T2] - *+AR0(5)
   P  displacement (PC Rel)   0--15   [D,J,JS] - @start, start
   Q  register (all)          0--15   [A,AB,AU,A2,A3,AY,BA,BI,D,I2,J,JS] - R0, AR0, DP, SP
   q  register (0-11)         0--15   [AF,B,BB] - R0, R7, R11
   R  register (all)         16--20   [A,AB,AU,AF,A6,A7,R,T,TC] - R0, AR0, DP, SP
   r  register (0-11)        16--20   [B,BA,BB,BI,B6,B7,RF,S,SC] - R0, R1, R11
   S  short int immediate     0--15   [A,AB,AY,BI] - -5, 5
   T  integer (C4x)          16--20   [Z] - -5, 12
   U  unsigned integer        0--15   [AU,A3] - 0, 65535
   V  vector (C4x: 0--8)      0--4    [Z] - 25, 7
   W  short int (C4x)         0--7    [T,TC,T2,T2C] - -3, 5
   X  expansion reg (C4x)     0--4    [Z] - IVTP, TVTP
   Y  address reg (C4x)      16--20   [Z] - AR0, DP, SP, IR0
   Z  expansion reg (C4x)    16--20   [Z] - IVTP, TVTP
*/

/* A: General 2-operand integer operations
   Syntax: <i> src, dst
      src = Register (Q), Direct (@), Indirect (*), Signed immediate (S)
      dst = Register (R)
   Instr: 15/8 - ABSI, ADDC, ADDI, ASH, CMPI, LDI, LSH, MPYI, NEGB, NEGI,
                SUBB, SUBC, SUBI, SUBRB, SUBRI, C4x: LBn, LHn, LWLn, LWRn,
                MBn, MHn, MPYSHI, MPYUHI
*/
#define A_CLASS(name, level) \
  .ifdef level                    &\
name##_A:                         &\
  name  AR1, AR0        /* Q;R */ &\
  name  AR0             /* Q;R */ &\
  name  @start, AR0     /* @,R */ &\
  name  *+AR0(5), AR0   /* *,R */ &\
  name  -5, AR0         /* S,R */ &\
  .endif


/* AB: General 2-operand integer operation with condition
   Syntax: <i>c src, dst
       c   = Condition
       src = Register (Q), Direct (@), Indirect (*), Signed immediate (S)
       dst = Register (R)
   Instr: 1/0 - LDIc
*/
#define AB_CLASS(name, level) \
  .ifdef level                    &\
name##_AB:                        &\
  name  AR1, AR0        /* Q;R */ &\
  name  AR0             /* Q;R */ &\
  name  @start, AR0     /* @,R */ &\
  name  *+AR0(5), AR0   /* *,R */ &\
  name  -5, AR0         /* S,R */ &\
  .endif


/* AU: General 2-operand unsigned integer operation
   Syntax: <i> src, dst
        src = Register (Q), Direct (@), Indirect (*), Unsigned immediate (U)
        dst = Register (R)
   Instr: 6/2 - AND, ANDN, NOT, OR, TSTB, XOR, C4x: LBUn, LHUn
*/
#define AU_CLASS(name, level) \
  .ifdef level                    &\
name##_AU:                        &\
  name  AR1, AR0        /* Q;R */ &\
  name  AR0             /* Q;R */ &\
  name  @start, AR0     /* @,R */ &\
  name  *+AR0(5), AR0   /* *,R */ &\
  name  5, AR0          /* U,R */ &\
  .endif


/* AF: General 2-operand float to integer operation
   Syntax: <i> src, dst
        src = Register 0-11 (q), Direct (@), Indirect (*), Float immediate (F)
        dst = Register (R)
   Instr: 1/0 - FIX
*/
#define AF_CLASS(name, level) \
  .ifdef level                    &\
name##_AF:                        &\
  name  R1, R0          /* q;R */ &\
  name  R0              /* q;R */ &\
  name  @start, AR0     /* @,R */ &\
  name  *+AR0(5), AR0   /* *,R */ &\
  name  3.5, AR0        /* F,R */ &\
  .endif


/* A2: Limited 1-operand (integer) operation
   Syntax: <i> src
       src = Register (Q), Indirect (*), None
   Instr: 1/0 - NOP
*/
#define A2_CLASS(name, level) \
  .ifdef level                    &\
name##_A2:                        &\
  name  AR0               /* Q */ &\
  name  *+AR0(5)          /* * */ &\
  name                    /*   */ &\
  .endif


/* A3: General 1-operand unsigned integer operation
   Syntax: <i> src
        src = Register (Q), Direct (@), Indirect (*), Unsigned immediate (U)
   Instr: 1/0 - RPTS
*/
#define A3_CLASS(name, level) \
  .ifdef level                    &\
name##_A3:                        &\
  name  AR1               /* Q */ &\
  name  @start            /* @ */ &\
  name  *+AR0(5)          /* * */ &\
  name  5                 /* U */ &\
  .endif


/* A6: Limited 2-operand integer operation
   Syntax: <i> src, dst
       src = Direct (@), Indirect (*)
       dst = Register (R)
   Instr: 1/1 - LDII, C4x: SIGI
*/
#define A6_CLASS(name, level) \
  .ifdef level                    &\
name##_A6:                        &\
  name  @start, AR0     /* @,R */ &\
  name  *+AR0(5), AR0   /* *,R */ &\
  .endif


/* A7: Limited 2-operand integer store operation
   Syntax: <i> src, dst
       src = Register (R)
       dst = Direct (@), Indirect (*)
   Instr: 2/0 - STI, STII
*/
#define A7_CLASS(name, level) \
  .ifdef level                    &\
name##_A7:                        &\
  name  AR0, @start     /* R,@ */ &\
  name  AR0, *+AR0(5)   /* R,* */ &\
  .endif


/* AY: General 2-operand signed address load operation
   Syntax: <i> src, dst
        src = Register (Q), Direct (@), Indirect (*), Signed immediate (S)
        dst = Address register - ARx, IRx, DP, BK, SP (Y)
   Instr: 0/1 - C4x: LDA
   Note: Q and Y should *never* be the same register
*/
#define AY_CLASS(name, level) \
  .ifdef level                    &\
name##_AY:                        &\
  name  AR1, AR0        /* Q,Y */ &\
  name  @start, AR0     /* @,Y */ &\
  name  *+AR0(5), AR0   /* *,Y */ &\
  name  -5, AR0         /* S,Y */ &\
  .endif


/* B: General 2-operand float operation
   Syntax: <i> src, dst
       src = Register 0-11 (q), Direct (@), Indirect (*), Float immediate (F)
       dst = Register 0-11 (r)
   Instr: 12/2 - ABSF, ADDF, CMPF, LDE, LDF, LDM, MPYF, NEGF, NORM, RND,
                 SUBF, SUBRF, C4x: RSQRF, TOIEEE
*/
#define B_CLASS(name, level) \
  .ifdef level                    &\
name##_B:                         &\
  name  R1, R0          /* q;r */ &\
  name  R0              /* q;r */ &\
  name  @start, R0      /* @,r */ &\
  name  *+AR0(5), R0    /* *,r */ &\
  name  3.5, R0         /* F,r */ &\
  .endif


/* BA: General 2-operand integer to float operation
   Syntax: <i> src, dst
       src = Register (Q), Direct (@), Indirect (*), Float immediate (F)
       dst = Register 0-11 (r)
   Instr: 0/1 - C4x: CRCPF
*/
#define BA_CLASS(name, level) \
  .ifdef level                    &\
name##_BA:                        &\
  name  AR1, R0         /* Q;r */ &\
  name  R0              /* Q;r */ &\
  name  @start, R0      /* @,r */ &\
  name  *+AR0(5), R0    /* *,r */ &\
  name  3.5, R0         /* F,r */ &\
  .endif


/* BB: General 2-operand conditional float operation
   Syntax: <i>c src, dst
       c   = Condition
       src = Register 0-11 (q), Direct (@), Indirect (*), Float immediate (F)
       dst = Register 0-11 (r)
   Instr: 1/0 - LDFc
*/
#define BB_CLASS(name, level) \
  .ifdef level                    &\
name##_BB:                        &\
  name  R1, R0          /* q;r */ &\
  name  R0              /* q;r */ &\
  name  @start, R0      /* @,r */ &\
  name  *+AR0(5), R0    /* *,r */ &\
  name  3.5, R0         /* F,r */ &\
  .endif


/* BI: General 2-operand integer to float operation (yet different to BA)
   Syntax: <i> src, dst
       src = Register (Q), Direct (@), Indirect (*), Signed immediate (S)
       dst = Register 0-11 (r)
   Instr: 1/0 - FLOAT
*/
#define BI_CLASS(name, level) \
  .ifdef level                    &\
name##_BI:                        &\
  name  AR1, R0         /* Q;r */ &\
  name  R0              /* Q;r */ &\
  name  @start, R0      /* @,r */ &\
  name  *+AR0(5), R0    /* *,r */ &\
  name  -5, R0          /* S,r */ &\
  .endif


/* B6: Limited 2-operand float operation 
   Syntax: <i> src, dst
       src = Direct (@), Indirect (*)
       dst = Register 0-11 (r)
   Instr: 1/1 - LDFI, C4x: FRIEEE
*/
#define B6_CLASS(name, level) \
  .ifdef level                    &\
name##_B6:                        &\
  name  @start, R0      /* @,r */ &\
  name  *+AR0(5), R0    /* *,r */ &\
  .endif