timer.map.qmsg

多功能计时器,具有校准

{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "EN adjuster.vhd(78) " "Warning (10492): VHDL Process Statement warning at adjuster.vhd(78): signal \"EN\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "adjuster.vhd" "" { Text "F:/clock/adjuster.vhd" 78 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "S_ENOUT adjuster.vhd(79) " "Warning (10492): VHDL Process Statement warning at adjuster.vhd(79): signal \"S_ENOUT\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "adjuster.vhd" "" { Text "F:/clock/adjuster.vhd" 79 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "M_ENOUT adjuster.vhd(80) " "Warning (10492): VHDL Process Statement warning at adjuster.vhd(80): signal \"M_ENOUT\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "adjuster.vhd" "" { Text "F:/clock/adjuster.vhd" 80 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "CLK1HZ adjuster.vhd(81) " "Warning (10492): VHDL Process Statement warning at adjuster.vhd(81): signal \"CLK1HZ\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "adjuster.vhd" "" { Text "F:/clock/adjuster.vhd" 81 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "counter60 counter60:SEC_CONTROL " "Info: Elaborating entity \"counter60\" for hierarchy \"counter60:SEC_CONTROL\"" {  } { { "top.vhd" "SEC_CONTROL" { Text "F:/clock/top.vhd" 93 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_USED_EXPLICIT_DEFAULT_VALUE" "LOW_REG counter60.vhd(17) " "Warning (10540): VHDL Signal Declaration warning at counter60.vhd(17): used explicit default value for signal \"LOW_REG\" because signal was never assigned a value" {  } { { "counter60.vhd" "" { Text "F:/clock/counter60.vhd" 17 0 0 } }  } 0 10540 "VHDL Signal Declaration warning at %2!s!: used explicit default value for signal \"%1!s!\" because signal was never assigned a value" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LOW\[3\] counter60.vhd(11) " "Warning (10034): Output port \"LOW\[3\]\" at counter60.vhd(11) has no driver" {  } { { "counter60.vhd" "" { Text "F:/clock/counter60.vhd" 11 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LOW\[2\] counter60.vhd(11) " "Warning (10034): Output port \"LOW\[2\]\" at counter60.vhd(11) has no driver" {  } { { "counter60.vhd" "" { Text "F:/clock/counter60.vhd" 11 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LOW\[1\] counter60.vhd(11) " "Warning (10034): Output port \"LOW\[1\]\" at counter60.vhd(11) has no driver" {  } { { "counter60.vhd" "" { Text "F:/clock/counter60.vhd" 11 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LOW\[0\] counter60.vhd(11) " "Warning (10034): Output port \"LOW\[0\]\" at counter60.vhd(11) has no driver" {  } { { "counter60.vhd" "" { Text "F:/clock/counter60.vhd" 11 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "counter24 counter24:HOUR_CONTROL " "Info: Elaborating entity \"counter24\" for hierarchy \"counter24:HOUR_CONTROL\"" {  } { { "top.vhd" "HOUR_CONTROL" { Text "F:/clock/top.vhd" 111 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "display display:DIS_LED1 " "Info: Elaborating entity \"display\" for hierarchy \"display:DIS_LED1\"" {  } { { "top.vhd" "DIS_LED1" { Text "F:/clock/top.vhd" 120 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "IOPT_OPT_PROTECT_A_CLOCK_MUX" "" "Info: Clock multiplexers have been protected" {  } {  } 0 0 "Clock multiplexers have been protected" 0 0 "" 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "LED1\[0\] VCC " "Warning: Pin \"LED1\[0\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 11 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED1\[1\] VCC " "Warning: Pin \"LED1\[1\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 11 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED1\[2\] VCC " "Warning: Pin \"LED1\[2\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 11 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED1\[3\] VCC " "Warning: Pin \"LED1\[3\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 11 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED1\[4\] VCC " "Warning: Pin \"LED1\[4\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 11 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED1\[5\] VCC " "Warning: Pin \"LED1\[5\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 11 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED1\[6\] GND " "Warning: Pin \"LED1\[6\]\" stuck at GND" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 11 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED2\[0\] VCC " "Warning: Pin \"LED2\[0\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 12 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED2\[1\] VCC " "Warning: Pin \"LED2\[1\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 12 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED2\[2\] VCC " "Warning: Pin \"LED2\[2\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 12 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED2\[3\] VCC " "Warning: Pin \"LED2\[3\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 12 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED2\[4\] VCC " "Warning: Pin \"LED2\[4\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 12 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED2\[5\] VCC " "Warning: Pin \"LED2\[5\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 12 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED2\[6\] GND " "Warning: Pin \"LED2\[6\]\" stuck at GND" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 12 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED3\[0\] VCC " "Warning: Pin \"LED3\[0\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 13 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED3\[1\] VCC " "Warning: Pin \"LED3\[1\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 13 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED3\[2\] VCC " "Warning: Pin \"LED3\[2\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 13 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED3\[3\] VCC " "Warning: Pin \"LED3\[3\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 13 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED3\[4\] VCC " "Warning: Pin \"LED3\[4\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 13 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED3\[5\] VCC " "Warning: Pin \"LED3\[5\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 13 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED3\[6\] GND " "Warning: Pin \"LED3\[6\]\" stuck at GND" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 13 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED4\[0\] VCC " "Warning: Pin \"LED4\[0\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 14 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED4\[1\] VCC " "Warning: Pin \"LED4\[1\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 14 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED4\[2\] VCC " "Warning: Pin \"LED4\[2\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 14 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED4\[3\] VCC " "Warning: Pin \"LED4\[3\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 14 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED4\[4\] VCC " "Warning: Pin \"LED4\[4\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 14 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED4\[5\] VCC " "Warning: Pin \"LED4\[5\]\" stuck at VCC" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 14 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LED4\[6\] GND " "Warning: Pin \"LED4\[6\]\" stuck at GND" {  } { { "top.vhd" "" { Text "F:/clock/top.vhd" 14 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "76 " "Info: Implemented 76 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "3 " "Info: Implemented 3 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "42 " "Info: Implemented 42 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "31 " "Info: Implemented 31 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 46 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 46 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "157 " "Info: Allocated 157 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Sat Sep 27 19:31:34 2008 " "Info: Processing ended: Sat Sep 27 19:31:34 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}