📄 sfr62p.inc
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ilvl0_int0ic .btequ 0,int0ic ; Interrupt priority level select bit
ilvl1_int0ic .btequ 1,int0ic ; Interrupt priority level select bit
ilvl2_int0ic .btequ 2,int0ic ; Interrupt priority level select bit
ir_int0ic .btequ 3,int0ic ; Interrupt request bit
pol_int0ic .btequ 4,int0ic ; Polarity select bit
;
;-------------------------------------------------------
; INT1 interrupt control register
;-------------------------------------------------------
int1ic .equ 005eh
;
ilvl0_int1ic .btequ 0,int1ic ; Interrupt priority level select bit
ilvl1_int1ic .btequ 1,int1ic ; Interrupt priority level select bit
ilvl2_int1ic .btequ 2,int1ic ; Interrupt priority level select bit
ir_int1ic .btequ 3,int1ic ; Interrupt request bit
pol_int1ic .btequ 4,int1ic ; Polarity select bit
;
;-------------------------------------------------------
; INT2 interrupt control register
;-------------------------------------------------------
int2ic .equ 005fh
;
ilvl0_int2ic .btequ 0,int2ic ; Interrupt priority level select bit
ilvl1_int2ic .btequ 1,int2ic ; Interrupt priority level select bit
ilvl2_int2ic .btequ 2,int2ic ; Interrupt priority level select bit
ir_int2ic .btequ 3,int2ic ; Interrupt request bit
pol_int2ic .btequ 4,int2ic ; Polarity select bit
;
;-------------------------------------------------------
; Flash identification register
;-------------------------------------------------------
fidr .equ 01b4h
;
fidr0 .btequ 0,fidr ; Flash module type identification value
fidr1 .btequ 1,fidr ; Flash module type identification value
;
;-------------------------------------------------------
; Flash memory control register 1
;-------------------------------------------------------
fmr1 .equ 01b5h
;
fmr11 .btequ 1,fmr1 ; EW1 mode select bit
fmr16 .btequ 6,fmr1 ; Lock bit status flag
;
;-------------------------------------------------------
; Flash memory control register 0
;-------------------------------------------------------
fmr0 .equ 01b7h
;
fmr00 .btequ 0,fmr0 ; RY/BY~ status flag
fmr01 .btequ 1,fmr0 ; EW0 mode select bit
fmr02 .btequ 2,fmr0 ; Lock bit disable bit
fmstp .btequ 3,fmr0 ; Flash memory stop bit
fmr05 .btequ 5,fmr0 ; User ROM area select bit
fmr06 .btequ 6,fmr0 ; Program status flag
fmr07 .btequ 7,fmr0 ; Erase status flag
;
;-------------------------------------------------------
; Address match interrupt register 2
;-------------------------------------------------------
rmad2 .equ 01b8h
rmad2l .equ rmad2 ; Address match interrupt register 2L
rmad2m .equ rmad2+1 ; Address match interrupt register 2M
rmad2h .equ rmad2+2 ; Address match interrupt register 2H
;
;-------------------------------------------------------
; Address match interrupt enable register 2
;-------------------------------------------------------
aier2 .equ 01bbh
;
aier20 .btequ 0,aier2 ; Address match interrupt 2 enable bit
aier21 .btequ 1,aier2 ; Address match interrupt 3 enable bit
;
;-------------------------------------------------------
; Address match interrupt register 3
;-------------------------------------------------------
rmad3 .equ 01bch
rmad3l .equ rmad3 ; Address match interrupt register 3L
rmad3m .equ rmad3+1 ; Address match interrupt register 3M
rmad3h .equ rmad3+2 ; Address match interrupt register 3H
;
;-------------------------------------------------------
; Peripheral clock select register
;-------------------------------------------------------
pclkr .equ 025eh
;
pclk0 .btequ 0,pclkr ; TimerA,B clock select bit
pclk1 .btequ 1,pclkr ; SI/O clock select bit
;
;-------------------------------------------------------
; Timer B3,B4,B5 count start flag
;-------------------------------------------------------
tbsr .equ 0340h
;
tb3s .btequ 5,tbsr ; Timer B3 count start flag
tb4s .btequ 6,tbsr ; Timer B4 count start flag
tb5s .btequ 7,tbsr ; Timer B5 count start flag
;
;--------------------------------------------------------------
; Timer A1-1 register : Read and write data in 16-bit unit.
;--------------------------------------------------------------
ta11 .equ 0342h
;
;--------------------------------------------------------------
; Timer A2-1 register : Read and write data in 16-bit unit.
;--------------------------------------------------------------
ta21 .equ 0344h
;
;--------------------------------------------------------------
; Timer A4-1 register : Read and write data in 16-bit unit.
;--------------------------------------------------------------
ta41 .equ 0346h
;
;-------------------------------------------------------
; Three-phase PWM control register 0
;-------------------------------------------------------
invc0 .equ 0348h
;
inv00 .btequ 0,invc0 ; Effective interrupt output polarity select bit
inv01 .btequ 1,invc0 ; Effective interrupt output specification bit
inv02 .btequ 2,invc0 ; Mode select bit
inv03 .btequ 3,invc0 ; Output control bit
inv04 .btequ 4,invc0 ; Positive and negative phases concurrent L output disable function enable bit
inv05 .btequ 5,invc0 ; Positive and negative phases concurrent L output detect flag
inv06 .btequ 6,invc0 ; Modulation mode select bit
inv07 .btequ 7,invc0 ; Software trigger bit
;
;-------------------------------------------------------
; Three-phase PWM control register 1
;-------------------------------------------------------
invc1 .equ 0349h
;
inv10 .btequ 0,invc1 ; Timer Ai start trigger signal select bit
inv11 .btequ 1,invc1 ; Timer A1-1,A2-1,A4-1 control bit
inv12 .btequ 2,invc1 ; Dead time timer count source select bit
inv13 .btequ 3,invc1 ; Carrier wave detect flag
inv14 .btequ 4,invc1 ; Output porality control bit
inv15 .btequ 5,invc1 ; Dead time invalid bit
inv16 .btequ 6,invc1 ; Dead time timer trigger select bit
inv17 .btequ 7,invc1 ; Waveform reflect timing select bit
;
;-------------------------------------------------------
; Three-phase output buffer register 0
;-------------------------------------------------------
idb0 .equ 034ah
;
du0 .btequ 0,idb0 ; U phase output buffer 0
dub0 .btequ 1,idb0 ; U~ phase output buffer 0
dv0 .btequ 2,idb0 ; V phase output buffer 0
dvb0 .btequ 3,idb0 ; V~ phase output buffer 0
dw0 .btequ 4,idb0 ; W phase output buffer 0
dwb0 .btequ 5,idb0 ; W~ phase output buffer 0
;
;-------------------------------------------------------
; Three-phase output buffer register 1
;-------------------------------------------------------
idb1 .equ 034bh
;
du1 .btequ 0,idb1 ; U phase output buffer 1
dub1 .btequ 1,idb1 ; U~ phase output buffer 1
dv1 .btequ 2,idb1 ; V phase output buffer 1
dvb1 .btequ 3,idb1 ; V~ phase output buffer 1
dw1 .btequ 4,idb1 ; W phase output buffer 1
dwb1 .btequ 5,idb1 ; W~ phase output buffer 1
;
;-------------------------------------------------------
; Dead time timer ; Use "MOV" instruction when writing to this register.
;-------------------------------------------------------
dtt .equ 034ch
;
;-------------------------------------------------------
; Timer B2 interrupt occurrences frequency set counter ; Use "MOV" instruction when writing to this register.
;-------------------------------------------------------
ictb2 .equ 034dh
;
;--------------------------------------------------------------
; Timer B3 register : Read and write data in 16-bit unit.
;--------------------------------------------------------------
tb3 .equ 0350h
;
;--------------------------------------------------------------
; Timer B4 register : Read and write data in 16-bit unit.
;--------------------------------------------------------------
tb4 .equ 0352h
;
;--------------------------------------------------------------
; Timer B5 register : Read and write data in 16-bit unit.
;--------------------------------------------------------------
tb5 .equ 0354h
;
;-------------------------------------------------------
; Timer B3 mode register
;-------------------------------------------------------
tb3mr .equ 035bh
;
tmod0_tb3mr .btequ 0,tb3mr ; Operation mode select bit
tmod1_tb3mr .btequ 1,tb3mr ; Operation mode select bit
mr0_tb3mr .btequ 2,tb3mr ;
mr1_tb3mr .btequ 3,tb3mr ;
mr2_tb3mr .btequ 4,tb3mr ;
mr3_tb3mr .btequ 5,tb3mr ;
tck0_tb3mr .btequ 6,tb3mr ; Count source select bit
tck1_tb3mr .btequ 7,tb3mr ; Count source select bit
;
;-------------------------------------------------------
; Timer B4 mode register
;-------------------------------------------------------
tb4mr .equ 035ch
;
tmod0_tb4mr .btequ 0,tb4mr ; Operation mode select bit
tmod1_tb4mr .btequ 1,tb4mr ; Operation mode select bit
mr0_tb4mr .btequ 2,tb4mr ;
mr1_tb4mr .btequ 3,tb4mr ;
mr3_tb4mr .btequ 5,tb4mr ;
tck0_tb4mr .btequ 6,tb4mr ; Count source select bit
tck1_tb4mr .btequ 7,tb4mr ; Count source select bit
;
;-------------------------------------------------------
; Timer B5 mode register
;-------------------------------------------------------
tb5mr .equ 035dh
;
tmod0_tb5mr .btequ 0,tb5mr ; Operation mode select bit
tmod1_tb5mr .btequ 1,tb5mr ; Operation mode select bit
mr0_tb5mr .btequ 2,tb5mr ;
mr1_tb5mr .btequ 3,tb5mr ;
mr3_tb5mr .btequ 5,tb5mr ;
tck0_tb5mr .btequ 6,tb5mr ; Count source select bit
tck1_tb5mr .btequ 7,tb5mr ; Count source select bit
;
;-------------------------------------------------------
; Interrupt request cause select register 2
;-------------------------------------------------------
ifsr2a .equ 035eh
;
ifsr26 .btequ 6,ifsr2a ; Interrupt request cause select bit
ifsr27 .btequ 7,ifsr2a ; Interrupt request cause select bit
;
;-------------------------------------------------------
; Interrupt request cause select register
;-------------------------------------------------------
ifsr .equ 035fh
;
ifsr0 .btequ 0,ifsr ; INT0~ interrupt polarity switching bit
ifsr1 .btequ 1,ifsr ; INT1~ interrupt polarity switching bit
ifsr2 .btequ 2,ifsr ; INT2~ interrupt polarity switching bit
ifsr3 .btequ 3,ifsr ; INT3~ interrupt polarity switching bit
ifsr4 .btequ 4,ifsr ; INT4~ interrupt polarity switching bit
ifsr5 .btequ 5,ifsr ; INT5~ interrupt polarity switching bit
ifsr6 .btequ 6,ifsr ; Interrupt request cause select bit
ifsr7 .btequ 7,ifsr ; Interrupt request cause select bit
;
;-------------------------------------------------------
; SI/O3 transmit/receive register
;-------------------------------------------------------
s3trr .equ 0360h
;
;-------------------------------------------------------
; SI/O3 control register
;-------------------------------------------------------
s3c .equ 0362h
;
sm30 .btequ 0,s3c ; Internal synchronous clock select bit
sm31 .btequ 1,s3c ; Internal synchronous clock select bit
sm32 .btequ 2,s3c ; Sout3 output disable bit
sm33 .btequ 3,s3c ; SI/O3 port select bit
sm34 .btequ 4,s3c ; CLK polarity select bit
sm35 .btequ 5,s3c ; Transfer direction select bit
sm36 .btequ 6,s3c ; Synchronous clock select bit
sm37 .btequ 7,s3c ; Sout3 initial value set bit
;
;-------------------------------------------------------
; SI/O3 bit rate generator ; Use "MOV" instruction when writing to this register.
;-------------------------------------------------------
s3brg .equ 0363h
;
;-------------------------------------------------------
; SI/O4 transmit/receive register
;-------------------------------------------------------
s4trr .equ 0364h
;
;-------------------------------------------------------
; SI/O4 control register
;-------------------------------------------------------
s4c .equ 0366h
;
sm40 .btequ 0,s4c ; Internal synchronous clock select bit
sm41 .btequ 1,s4c ; Internal synchronous clock select bit
sm42 .btequ 2,s4c ; Sout4 output disable bit
sm43 .btequ 3,s4c ; SI/O4 port select bit
sm44 .btequ 4,s4c ; CLK polarity select bit
sm45 .btequ 5,s4c ; Transfer direction select bit
sm46 .btequ 6,s4c ; Synchronous clock select bit
sm47 .btequ 7,s4c ; Sout4 initial value set bit
;
;-------------------------------------------------------
; SI/O4 bit rate generator ; Use "MOV" instruction when writing to this register.
;-------------------------------------------------------
s4brg .equ 0367h
;
;-------------------------------------------------------
; UART0 special mode register 4
;-------------------------------------------------------
u0smr4 .equ 036ch
;
stareq_u0smr4 .btequ 0,u0smr4 ; Start condition generate bit
rstareq_u0smr4 .btequ 1,u0smr4 ; Restart condition generate bit
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