testcoreb.mak

OV7660驱动程序

# Generated by the VisualDSP++ IDDE

# Note:  Any changes made to this Makefile will be lost the next time the
# matching project file is loaded into the IDDE.  If you wish to preserve
# changes, rename this file and run it externally to the IDDE.

# The syntax of this Makefile is such that GNU Make v3.77 or higher is
# required.

# The current working directory should be the directory in which this
# Makefile resides.

# Supported targets:
#     ov7660_coreb_Debug
#     ov7660_coreb_Debug_clean

# Define this variable if you wish to run this Makefile on a host
# other than the host that created it and VisualDSP++ may be installed
# in a different directory.

ADI_DSP=C:\Program Files\Analog Devices\VisualDSP 5.0


# $VDSP is a gmake-friendly version of ADI_DIR

empty:=
space:= $(empty) $(empty)
VDSP_INTERMEDIATE=$(subst \,/,$(ADI_DSP))
VDSP=$(subst $(space),\$(space),$(VDSP_INTERMEDIATE))

RM=cmd /C del /F /Q

#
# Begin "ov7660_coreb_Debug" configuration
#

ifeq ($(MAKECMDGOALS),ov7660_coreb_Debug)

ov7660_coreb_Debug : ./Debug/ov7660_coreb.ldr 

./Debug/cache.doj :./cache.S ./cache.inc 
	@echo ".\cache.S"
	$(VDSP)/easmblkfn.exe .\cache.S -proc ADSP-BF561 -file-attr ProjectName=ov7660_coreb -g -stallcheck=none -si-revision 0.3 -o .\Debug\cache.doj -MM

Debug/corea.doj :corea.c corea.h system.h $(VDSP)/Blackfin/include/cdefBF561.h $(VDSP)/Blackfin/include/defBF561.h $(VDSP)/Blackfin/include/def_LPBlackfin.h $(VDSP)/Blackfin/include/cdef_LPBlackfin.h $(VDSP)/Blackfin/include/sys/exception.h $(VDSP)/Blackfin/include/ccblkfn.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/yvals.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/builtins.h $(VDSP)/Blackfin/include/sys/builtins_support.h $(VDSP)/Blackfin/include/fract_typedef.h $(VDSP)/Blackfin/include/fr2x16_typedef.h $(VDSP)/Blackfin/include/r2x16_typedef.h $(VDSP)/Blackfin/include/raw_typedef.h $(VDSP)/Blackfin/include/sys/mc_typedef.h cache.h 
	@echo ".\corea.c"
	$(VDSP)/ccblkfn.exe -c .\corea.c -file-attr ProjectName=ov7660_coreb -g -structs-do-not-overlap -no-multiline -double-size-32 -decls-strong -warn-protos -si-revision 0.3 -proc ADSP-BF561 -o .\Debug\corea.doj -MM

./Debug/ov7660_coreb_basiccrt.doj :./ov7660_coreb_basiccrt.s $(VDSP)/Blackfin/include/cplb.h $(VDSP)/Blackfin/include/defBF561.h $(VDSP)/Blackfin/include/def_LPBlackfin.h $(VDSP)/Blackfin/include/sys/_adi_platform.h $(VDSP)/Blackfin/include/sys/anomaly_macros_rtl.h $(VDSP)/Blackfin/include/sys/platform.h 
	@echo ".\ov7660_coreb_basiccrt.s"
	$(VDSP)/easmblkfn.exe .\ov7660_coreb_basiccrt.s -proc ADSP-BF561 -file-attr ProjectName=ov7660_coreb -g -stallcheck=none -si-revision 0.3 -o .\Debug\ov7660_coreb_basiccrt.doj -MM

Debug/ov7660_coreb_cplbtab561b.doj :ov7660_coreb_cplbtab561b.c $(VDSP)/Blackfin/include/sys/platform.h $(VDSP)/Blackfin/include/sys/_adi_platform.h $(VDSP)/Blackfin/include/cdefBF561.h $(VDSP)/Blackfin/include/defBF561.h $(VDSP)/Blackfin/include/def_LPBlackfin.h $(VDSP)/Blackfin/include/cdef_LPBlackfin.h $(VDSP)/Blackfin/include/cplbtab.h $(VDSP)/Blackfin/include/cplb.h 
	@echo ".\ov7660_coreb_cplbtab561b.c"
	$(VDSP)/ccblkfn.exe -c .\ov7660_coreb_cplbtab561b.c -file-attr ProjectName=ov7660_coreb -g -structs-do-not-overlap -no-multiline -double-size-32 -decls-strong -warn-protos -si-revision 0.3 -proc ADSP-BF561 -o .\Debug\ov7660_coreb_cplbtab561b.doj -MM

Debug/ov7660_coreb_heaptab.doj :ov7660_coreb_heaptab.c 
	@echo ".\ov7660_coreb_heaptab.c"
	$(VDSP)/ccblkfn.exe -c .\ov7660_coreb_heaptab.c -file-attr ProjectName=ov7660_coreb -g -structs-do-not-overlap -no-multiline -double-size-32 -decls-strong -warn-protos -si-revision 0.3 -proc ADSP-BF561 -o .\Debug\ov7660_coreb_heaptab.doj -MM

./Debug/ov7660_coreb.dxe :./ov7660_coreb.ldf ./Debug/ov7660_coreb_basiccrt.doj $(VDSP)/Blackfin/lib/bf561_rev_0.3/libprofile561y.dlb ./Debug/cache.doj ./Debug/corea.doj ./Debug/ov7660_coreb_cplbtab561b.doj ./Debug/ov7660_coreb_heaptab.doj $(VDSP)/Blackfin/lib/bf561_rev_0.3/crtn561y.doj $(VDSP)/Blackfin/lib/bf561_rev_0.3/libsmall561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/libio561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/libc561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/libevent561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/libx561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/libcpp561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/libcpprt561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/libf64ieee561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/libdsp561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/libsftflt561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/libetsi561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/Debug/libssl561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/Debug/libdrv561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/Debug/libusb561y.dlb $(VDSP)/Blackfin/lib/bf561_rev_0.3/librt_fileio561y.dlb 
	@echo "Linking..."
	$(VDSP)/ccblkfn.exe .\Debug\cache.doj .\Debug\corea.doj .\Debug\ov7660_coreb_basiccrt.doj .\Debug\ov7660_coreb_cplbtab561b.doj .\Debug\ov7660_coreb_heaptab.doj -T .\ov7660_coreb.ldf -flags-link -warnonce -L .\Debug -flags-link -MDUSE_INSTRUCTION_CACHE,-MDUSE_DATA_A_CACHE,-MDUSE_FILEIO,-MD__cplusplus,-MDUSE_CACHE,-MDUSER_CRT=ADI_QUOTEov7660_coreb_basiccrt.dojADI_QUOTE,-MDUSER_CPLBTAB_B=ADI_QUOTE.\Debug\\ov7660_coreb_cplbtab561b.dojADI_QUOTE -flags-link -i,"$(ADI_DSP)\Blackfin\include"; -add-debug-libpaths -flags-link -MDUSE_CACHE -flags-link -od,.\Debug -o .\Debug\ov7660_coreb.dxe -proc ADSP-BF561 -si-revision 0.3 -flags-link -MM

./Debug/ov7660_coreb.ldr :./Debug/ov7660_coreb.dxe 
	@echo "Creating loader file..."
	$(VDSP)/elfloader.exe .\Debug\ov7660_coreb.dxe -b Flash -f BINARY -Width 8 -o .\Debug\ov7660_coreb.ldr -si-revision 0.3 -proc ADSP-BF561 -MM

endif

ifeq ($(MAKECMDGOALS),ov7660_coreb_Debug_clean)

ov7660_coreb_Debug_clean:
	-$(RM) ".\Debug\cache.doj"
	-$(RM) "Debug\corea.doj"
	-$(RM) ".\Debug\ov7660_coreb_basiccrt.doj"
	-$(RM) "Debug\ov7660_coreb_cplbtab561b.doj"
	-$(RM) "Debug\ov7660_coreb_heaptab.doj"
	-$(RM) ".\Debug\ov7660_coreb.dxe"
	-$(RM) ".\Debug\ov7660_coreb.ldr"
	-$(RM) ".\Debug\*.ipa"
	-$(RM) ".\Debug\*.opa"
	-$(RM) ".\Debug\*.ti"
	-$(RM) ".\Debug\*.pgi"
	-$(RM) ".\*.rbld"

endif