📄 sdhcslot.cpp
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//
// Copyright (c) Microsoft Corporation. All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
// Copyright (c) 2002 BSQUARE Corporation. All rights reserved.
// DO NOT REMOVE --- BEGIN EXTERNALLY DEVELOPED SOURCE CODE ID 40973--- DO NOT REMOVE
#include <windows.h>
#include <nkintr.h>
#include <ceddk.h>
#include <s3c2443.h>
#include <bsp.h>
#include "SDHC.h"
#include "SDHCSlot.h"
//extern S3C2443_IOPORT_REG *pIOPreg;
// Macros
#define DX_D1_OR_D2(cps) ((cps) == D1 || (cps) == D2)
#define SETFNAME() LPCTSTR pszFname = _T(__FUNCTION__) _T(":")
#ifdef DEBUG
// dump the current request info to the debugger
static
VOID
DumpRequest(
PSD_BUS_REQUEST pRequest,
DWORD dwZone
)
{
PREFAST_DEBUGCHK(pRequest);
if (dwZone) {
DEBUGMSG(1, (TEXT("DumpCurrentRequest: 0x%08X\n"), pRequest));
DEBUGMSG(1, (TEXT("\t Command: %d\n"), pRequest->CommandCode));
DEBUGMSG(1, (TEXT("\t Argument: 0x%08x\n"), pRequest->CommandArgument));
DEBUGMSG(1, (TEXT("\t ResponseType: %d\n"), pRequest->CommandResponse.ResponseType));
DEBUGMSG(1, (TEXT("\t NumBlocks: %d\n"), pRequest->NumBlocks));
DEBUGMSG(1, (TEXT("\t BlockSize: %d\n"), pRequest->BlockSize));
DEBUGMSG(1, (TEXT("\t HCParam: %d\n"), pRequest->HCParam));
}
}
#else
#define DumpRequest(ptr, dw)
#endif
CSDHCSlotBase::CSDHCSlotBase(
)
{
m_pregDevice = NULL;
m_dwSlot = 0;
m_pbRegisters = NULL;
m_pHCDContext = NULL;
m_dwSysIntr = 0;
m_hBusAccess = NULL;
m_interfaceType = InterfaceTypeUndefined;
m_dwBusNumber = 0;
m_dwVddWindows = 0;
m_dwMaxClockRate = 0;
m_dwTimeoutControl = 0;
m_dwMaxBlockLen = 0;
m_pbDmaBuffer = NULL;
m_paDmaBuffer = 0;
m_wRegClockControl = 0;
m_wIntSignals = 0;
m_cpsCurrent = D0;
m_cpsAtPowerDown = D0;
m_dwDefaultWakeupControl = 0;
m_bWakeupControl = 0;
#ifdef DEBUG
m_dwReadyInts = 0;
#endif
m_fCommandCompleteOccurred = FALSE;
m_fSleepsWithPower = FALSE;
m_fPowerUpDisabledInts = FALSE;
m_fIsPowerManaged = FALSE;
m_fSDIOInterruptsEnabled = FALSE;
m_fCardPresent = FALSE;
m_fAutoCMD12Success = FALSE;
m_fCheckSlot = TRUE;
m_fCanWakeOnSDIOInterrupts = FALSE;
m_f4BitMode = FALSE;
m_fFakeCardRemoval = FALSE;
}
CSDHCSlotBase::~CSDHCSlotBase(
)
{
DEBUGCHK(m_pbDmaBuffer == NULL);
}
BOOL
CSDHCSlotBase::Init(
DWORD dwSlot,
volatile BYTE *pbRegisters,
PSDCARD_HC_CONTEXT pHCDContext,
DWORD dwSysIntr,
HANDLE hBusAccess,
INTERFACE_TYPE interfaceType,
DWORD dwBusNumber,
CReg *pregDevice
)
{
BOOL fRet = TRUE;
DEBUGCHK(dwSlot < SDHC_MAX_SLOTS);
DEBUGCHK(pbRegisters);
DEBUGCHK(pHCDContext);
DEBUGCHK(hBusAccess);
PREFAST_DEBUGCHK(pregDevice && pregDevice->IsOK());
m_dwSlot = dwSlot;
m_pbRegisters = pbRegisters;
m_pHCDContext = pHCDContext;
m_dwSysIntr = dwSysIntr;
m_hBusAccess = hBusAccess;
m_interfaceType = interfaceType;
m_dwBusNumber = dwBusNumber;
m_pregDevice = pregDevice;
fRet = SoftwareReset(SOFT_RESET_ALL);
if (fRet) {
Sleep(10); // Allow time for card to power down after a device reset
SSDHC_CAPABILITIES caps = GetCapabilities();
DEBUGMSG(SDCARD_ZONE_INIT && caps.bits.DMA,
(_T("SDHC Will use DMA for slot %u\n"), m_dwSlot));
m_dwVddWindows = DetermineVddWindows();
m_dwMaxClockRate = DetermineMaxClockRate();
m_dwMaxBlockLen = DetermineMaxBlockLen();
m_dwTimeoutControl = DetermineTimeoutControl();
m_dwDefaultWakeupControl = DetermineWakeupSources();
m_fCanWakeOnSDIOInterrupts = m_pregDevice->ValueDW(SDHC_CAN_WAKE_ON_INT_KEY);
Validate();
DumpRegisters();
}
return fRet;
}
SD_API_STATUS
CSDHCSlotBase::Start(
)
{
Validate();
SD_API_STATUS status;
if (SoftwareReset(SOFT_RESET_ALL)) {
RETAILMSG(1,(TEXT("CSDHCSlotBase::Start\n")));
// timeout control
WriteByte(SDHC_TIMEOUT_CONTROL, (BYTE) m_dwTimeoutControl);
// Enable error interrupt status and signals for all but the vendor
// errors. This allows any normal error to generate an interrupt.
WriteWord(SDHC_ERROR_INT_STATUS_ENABLE, ~0 & ~ERR_INT_STATUS_VENDOR);
WriteWord(SDHC_ERROR_INT_SIGNAL_ENABLE, ~0 & ~ERR_INT_STATUS_VENDOR);
// Enable all interrupt signals. During execution, we will enable
// and disable interrupt statuses as desired.
WriteWord(SDHC_NORMAL_INT_SIGNAL_ENABLE, 0xFFFF);
WriteWord(SDHC_NORMAL_INT_STATUS_ENABLE,
NORMAL_INT_ENABLE_CARD_INSERTION | NORMAL_INT_ENABLE_CARD_REMOVAL);
status = SD_API_STATUS_SUCCESS;
}
else {
status = SD_API_STATUS_DEVICE_NOT_RESPONDING;
}
return status;
}
SD_API_STATUS
CSDHCSlotBase::Stop(
)
{
if (m_fCardPresent) {
// Remove device
HandleRemoval(FALSE);
}
SoftwareReset(SOFT_RESET_ALL);
return SD_API_STATUS_SUCCESS;
}
SD_API_STATUS
CSDHCSlotBase::GetSlotInfo(
PSDCARD_HC_SLOT_INFO pSlotInfo
)
{
PREFAST_DEBUGCHK(pSlotInfo);
DEBUGCHK(m_pregDevice->IsOK());
// set the slot capabilities
SDHCDSetSlotCapabilities(pSlotInfo, SD_SLOT_SD_4BIT_CAPABLE |
SD_SLOT_SD_1BIT_CAPABLE |
SD_SLOT_SDIO_CAPABLE |
SD_SLOT_SDIO_INT_DETECT_4BIT_MULTI_BLOCK);
SDHCDSetVoltageWindowMask(pSlotInfo, m_dwVddWindows);
// Set optimal voltage
SDHCDSetDesiredSlotVoltage(pSlotInfo, GetDesiredVddWindow());
// Controller may be able to clock at higher than the max SD rate,
// but we should only report the highest rate in the range.
DWORD dwMaxClockRateInSDRange = SD_FULL_SPEED_RATE;
SetClockRate(&dwMaxClockRateInSDRange);
SDHCDSetMaxClockRate(pSlotInfo, dwMaxClockRateInSDRange);
// Set power up delay. We handle this in SetVoltage().
SDHCDSetPowerUpDelay(pSlotInfo, 1);
return SD_API_STATUS_SUCCESS;
}
SD_API_STATUS
CSDHCSlotBase::SlotOptionHandler(
SD_SLOT_OPTION_CODE sdOption,
PVOID pData,
DWORD cbData
)
{
SD_API_STATUS status = SD_API_STATUS_SUCCESS;
RETAILMSG(0,(TEXT("CSDHCSlotBase::SlotOptionHandle\nr")));
switch (sdOption) {
case SDHCDSetSlotPower: {
DEBUGCHK(cbData == sizeof(DWORD));
PDWORD pdwVddSetting = (PDWORD) pData;
SetVoltage(*pdwVddSetting);
break;
}
case SDHCDSetSlotInterface: {
DEBUGCHK(cbData == sizeof(SD_CARD_INTERFACE));
PSD_CARD_INTERFACE pInterface = (PSD_CARD_INTERFACE) pData;
DEBUGMSG(SDCARD_ZONE_INFO,
(TEXT("CSDHCSlotBase::SlotOptionHandler: Clock Setting: %d\n"),
pInterface->ClockRate));
SetInterface(pInterface);
break;
}
case SDHCDEnableSDIOInterrupts:
case SDHCDAckSDIOInterrupt:
EnableSDIOInterrupts(TRUE);
break;
case SDHCDDisableSDIOInterrupts:
EnableSDIOInterrupts(FALSE);
break;
case SDHCDGetWriteProtectStatus: {
DEBUGCHK(cbData == sizeof(SD_CARD_INTERFACE));
PSD_CARD_INTERFACE pInterface = (PSD_CARD_INTERFACE) pData;
pInterface->WriteProtected = IsWriteProtected();
RETAILMSG(1,(TEXT("Write Protected 0x%x\n"),(ReadDword(SDHC_PRESENT_STATE) &
STATE_WRITE_PROTECT)));
RETAILMSG(0,(TEXT("Write Protected 0x%x \n"),pInterface->WriteProtected ));
break;
}
case SDHCDQueryBlockCapability: {
DEBUGCHK(cbData == sizeof(SD_HOST_BLOCK_CAPABILITY));
PSD_HOST_BLOCK_CAPABILITY pBlockCaps =
(PSD_HOST_BLOCK_CAPABILITY)pData;
DEBUGMSG(SDCARD_ZONE_INFO,
(TEXT("CSDHCSlotBase::SlotOptionHandler: Read Block Length: %d , Read Blocks: %d\n"),
pBlockCaps->ReadBlockSize, pBlockCaps->ReadBlocks));
DEBUGMSG(SDCARD_ZONE_INFO,
(TEXT("CSDHCSlotBase::SlotOptionHandler: Write Block Length: %d , Write Blocks: %d\n"),
pBlockCaps->WriteBlockSize, pBlockCaps->WriteBlocks));
pBlockCaps->ReadBlockSize = max(pBlockCaps->ReadBlockSize, SDHC_MIN_BLOCK_LENGTH);
pBlockCaps->ReadBlockSize = min(pBlockCaps->ReadBlockSize, (USHORT) m_dwMaxBlockLen);
pBlockCaps->WriteBlockSize = max(pBlockCaps->WriteBlockSize, SDHC_MIN_BLOCK_LENGTH);
pBlockCaps->WriteBlockSize = min(pBlockCaps->WriteBlockSize, (USHORT) m_dwMaxBlockLen);
break;
}
case SDHCDGetSlotPowerState: {
DEBUGCHK(cbData == sizeof(CEDEVICE_POWER_STATE));
PCEDEVICE_POWER_STATE pcps = (PCEDEVICE_POWER_STATE) pData;
*pcps = GetPowerState();
break;
}
case SDHCDSetSlotPowerState: {
DEBUGCHK(cbData == sizeof(CEDEVICE_POWER_STATE));
PCEDEVICE_POWER_STATE pcps = (PCEDEVICE_POWER_STATE) pData;
SetPowerState(*pcps);
break;
}
case SDHCDWakeOnSDIOInterrupts: {
DEBUGCHK(cbData == sizeof(BOOL));
PBOOL pfWake = (PBOOL) pData;
if (m_fCanWakeOnSDIOInterrupts) {
DWORD dwWakeupControl = m_dwDefaultWakeupControl;
if (*pfWake) {
dwWakeupControl |= WAKEUP_INTERRUPT;
}
m_bWakeupControl = (BYTE) dwWakeupControl;
}
else {
status = SD_API_STATUS_UNSUCCESSFUL;
}
break;
}
case SDHCDGetSlotInfo: {
DEBUGCHK(cbData == sizeof(SDCARD_HC_SLOT_INFO));
PSDCARD_HC_SLOT_INFO pSlotInfo = (PSDCARD_HC_SLOT_INFO) pData;
status = GetSlotInfo(pSlotInfo);
break;
}
default:
status = SD_API_STATUS_INVALID_PARAMETER;
}
return status;
}
DWORD
CSDHCSlotBase::DetermineMaxClockRate(
)
{
DEBUGCHK(m_pregDevice->IsOK());
// We allow the registry to override what is in the capabilities register.
DWORD dwMaxClockRate = m_pregDevice->ValueDW(SDHC_FREQUENCY_KEY);
if (dwMaxClockRate == 0) {
SSDHC_CAPABILITIES caps = GetCapabilities();
dwMaxClockRate = caps.bits.ClkFreq * 1000000;
if (dwMaxClockRate == 0) {
// No clock frequency specified. Use the highest possible that
// could have been specified so that a working clock divisor
// will be chosen.
dwMaxClockRate = SDHC_MAX_CLOCK_FREQUENCY;
DEBUGMSG(SDCARD_ZONE_ERROR, (TEXT("SDHC: No base clock frequency specified\n")));
DEBUGMSG(SDCARD_ZONE_ERROR, (TEXT("SDHC: Using default frequency of %u\n"),
dwMaxClockRate));
}
}
RETAILMSG(0,(TEXT("dwMaxClockRate = %d\n"),dwMaxClockRate));
return dwMaxClockRate;
}
DWORD
CSDHCSlotBase::DetermineMaxBlockLen(
)
{
static const USHORT sc_rgusBlockLen[] = {
SDHC_CAPABILITIES_MAX_BLOCK_LENGTH_0,
SDHC_CAPABILITIES_MAX_BLOCK_LENGTH_1,
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