📄 init.c
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UINT16 g_hsync_cnt, g_vclk_cnt;
UINT8 g_lcd_frame_rate;
static void InitDisplay(void)
{
UINT8 pagewidth_in_byte=0,offsize_in_byte=0;
volatile S3C2443_IOPORT_REG *s2443IOP = (S3C2443_IOPORT_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_IOPORT, FALSE);
volatile S3C2443_LCD_REG *s2443LCD = (S3C2443_LCD_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_LCD, FALSE);
volatile S3C2443_INTR_REG *s2443INTR = (S3C2443_INTR_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_INTR, FALSE);
UINT8 clkval=0;
UINT16 lcd_horizon_value,lcd_line_value;
UINT8 lcd_vbpd,lcd_vfpd,lcd_vspw,lcd_hbpd,lcd_hfpd,lcd_hspw;
UINT16 * pFB = NULL;
//int i,j;
// Set up the LCD controller registers to display a power-on bitmap image.
//
s2443IOP->MISCCR |= (1<<28); // select LCD controller for TFT lcd controller
s2443IOP->GPCUDP = 0xFFFFFFFF;
s2443IOP->GPCCON = 0xAAAAAAAA;
s2443IOP->GPDUDP = 0xFFFFFFFF;
s2443IOP->GPDCON = 0xAAAAAAAA;
#if 1 // tempory
s2443IOP->GPBCON = (s2443IOP->GPBCON & ~(3<<8)) | (1<<8); // Backlight Pwm control
s2443IOP->GPBDAT |= (1<<8);
#else // control the backlight using pwm timer output
s2443IOP->GPBCON = (s2443IOP->GPBCON & ~(3<<8)) | (2<<8); // set Timer out
#endif
// LCD _nRESET control
s2443IOP->GPBCON = (s2443IOP->GPBCON & ~(3<<2)) |(1<<2);
s2443IOP->GPBDAT |= (1<<1);
switch(LCD_MODULE_TYPE)
{
/*
case LCD_MODULE_LTS222:
lcd_horizon_value = LTS222_HOZVAL;
lcd_line_value = LTS222_LINEVAL;
lcd_vbpd = LTS222_VBPD;
lcd_vfpd = LTS222_VFPD;
lcd_vspw = LTS222_VSPW;
lcd_hbpd = LTS222_HBPD;
lcd_hfpd = LTS222_HFPD;
lcd_hspw = LTS222_HSPW;
g_lcd_frame_rate = LTS222_FRAME_RATE;
InitLDI_LTS222();
break;
*/
case LCD_MODULE_LTV350:
lcd_horizon_value = LTV350_HOZVAL;
lcd_line_value = LTV350_LINEVAL;
lcd_vbpd = LTV350_VBPD;
lcd_vfpd = LTV350_VFPD;
lcd_vspw = LTV350_VSPW;
lcd_hbpd = LTV350_HBPD;
lcd_hfpd = LTV350_HFPD;
lcd_hspw = LTV350_HSPW;
g_lcd_frame_rate = LTV350_FRAME_RATE;
InitLDI_LTV350();
break;
default:
break;
}
pagewidth_in_byte = lcd_horizon_value/8*16;
offsize_in_byte = 0;
//LcdWindowOnOff(LCD_WIN_ALL,LCD_OFF);
s2443LCD->WINCON0 &= ~0x01;
s2443LCD->WINCON1 &= ~0x01;
//LcdEnvidOnOff(LCD_OFF);
s2443LCD->VIDCON0 &= (~3); // ENVID Off using Per Frame method
//Basic_Display_Setting(window,WINCONx_16BPP_565,lcd_horizon_value,0);
s2443LCD->VIDCON0 = VIDCON0_S_RGB_IF|VIDCON0_S_RGB_PAR|VIDCON0_S_VCLK_GATING_OFF|VIDCON0_S_CLKDIR_DIVIDED|VIDCON0_S_CLKSEL_HCLK;
g_hsync_cnt = (lcd_vbpd+lcd_vfpd+lcd_vspw+lcd_line_value);
g_vclk_cnt = (lcd_hbpd+lcd_hfpd+lcd_hspw+lcd_horizon_value);
//clkval = (UINT8)(((float)S3C2443_HCLK/(float)(g_hsync_cnt*g_vclk_cnt*g_lcd_frame_rate*2))+0.5)-1;
// change for using EPLL Clock
clkval = (UINT8)(((float)S3C2443_SCLK/(float)(g_hsync_cnt*g_vclk_cnt*g_lcd_frame_rate*2))+0.5)-1;
s2443LCD->VIDCON0 |= (clkval <<VIDCON0_CLKVAL_F_SHIFT)|VIDCON0_S_CLKSEL_UPLL;
//check point
s2443LCD->VIDCON1 = VIDCON1_S_HSYNC_INVERTED|VIDCON1_S_VSYNC_INVERTED;
s2443LCD->VIDTCON0=((lcd_vbpd-1)<<VIDTCON0_BPD_S)|((lcd_vfpd-1)<<VIDTCON0_FPD_S)|(lcd_vspw-1);
s2443LCD->VIDTCON1=((lcd_hbpd-1)<<VIDTCON0_BPD_S)|((lcd_hfpd-1)<<VIDTCON0_FPD_S)|(lcd_hspw-1);
s2443LCD->VIDTCON2 = ((lcd_line_value-1)<<VIDTCON2_LINEVAL_S)|(lcd_horizon_value-1);
s2443LCD->WINCON0 = (0<<WINCON_SWAP_S)|(WINCONx_16WORD_BURST<<WINCON_BURSTLEN_S)|(WINCONx_16BPP_565<<WINCON_BPP_S); // 4word burst, 16bpp,
s2443LCD->VIDOSD0A = (0<<VIDOSDxAB_HORIZON_X_S)|(0);
s2443LCD->VIDOSD0B = ((lcd_horizon_value-1)<<VIDOSDxAB_HORIZON_X_S)|(lcd_line_value-1);
s2443LCD->VIDW00ADD0B0 = (UINT32)IMAGE_FRAMEBUFFER_DMA_BASE;
// buffer end address
s2443LCD->VIDW00ADD1B0 = (UINT32)IMAGE_FRAMEBUFFER_DMA_BASE + (LCD_XSIZE_TFT*LCD_YSIZE_TFT*2);
// buffer size
s2443LCD->VIDW00ADD2B0 = (offsize_in_byte<<VIDWxADD2_OFFSET_SIZE_S)|(LCD_XSIZE_TFT*2);
s2443LCD->WINCON0 |= (1<<WINCON_SWAP_S);
//*WxKEYCON0_Reg_Addr[win_num] = 0;
//*WINxMAP_Reg_Addr[win_num] = 0;
s2443LCD->WINCON0 |= 0x1;
s2443LCD->VIDCON0 |= 0x3;
#ifdef DVS_EN
#if (DVS_METHOD == 1 || DVS_METHOD == 3)
// Enable LCD Interrupt for DVS + CLOCK Change.
s2443INTR->INTSUBMSK |= (0xf << IRQ_SUB_LCD1); // MASK all LCD Sub Interrupt
s2443INTR->INTSUBMSK &= ~(1 << IRQ_SUB_LCD3); // UnMASK LCD Frame Sub Interrupt
s2443LCD->VIDINTCON &= ~((0x3)<<15 | (0x3)<<13 | (0x1) <<12 | (0x1) ); // FRAMESEL0, INTFRMEN Bit clear
s2443LCD->VIDINTCON |= ((0x1)<<15 | /*(0x0)<<13 |*/ (0x1)<<12 | (0x1)); /// Video Frame Interrupt Enable
#endif
#else
s2443INTR->INTSUBMSK |= (0xf << IRQ_SUB_LCD1); // MASK LCD Sub Interrupt
#endif
//memcpy((void *)IMAGE_FRAMEBUFFER_UA_BASE, prayer16bpp, LCD_ARRAY_SIZE_TFT_16BIT);
/*
pFB = (UINT16 *)IMAGE_FRAMEBUFFER_UA_BASE;
for (i=0; i<240; i++)
{
for (j=0; j<320; j++)
{
if (i < (240/2))
{
if (j < (320/2)) *(pFB + j + i * 320) = 0xF800;
else *(pFB + j + i * 320) = 0x07E0;
} else
{
if (j < (320/2)) *(pFB + j + i * 320) = 0x001F;
else *(pFB + j + i * 320) = 0xFFFF;
}
}
}*/
}
void ConfigureGPIO()
{
volatile S3C2443_IOPORT_REG *s2443IOP = (S3C2443_IOPORT_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_IOPORT, FALSE);
volatile S3C2443_CLKPWR_REG *s2443CLKPWR = (S3C2443_CLKPWR_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_CLOCK_POWER, FALSE);
#if 1 //+ ksk tbd
s2443IOP->GPFCON = 0x5555;
s2443IOP->GPGCON = 0x55555555;
//s2443IOP->GPFUDP = 0xffff; // The pull up function is disabled GPF[7:0]
#endif
}
#ifdef DVS_EN
void ChangeVoltage(int vtg)
{
CurrVoltage = vtg;
Max1718_Set(ARM_VDD, vtg);
}
int GetCurrentVoltage()
{
return CurrVoltage;
}
#endif
//------------------------------------------------
// MAX1718 ARM core, internal regulator setting added 06.07.03 JJG
//------------------------------------------------
void Max1718_Set(int pwr, int voltage) // add 060624
{
volatile S3C2443_IOPORT_REG *s2443IOP = (S3C2443_IOPORT_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_IOPORT, FALSE);
// volatile S3C2443_IOPORT_REG *s2443IOP = (S3C2443_IOPORT_REG *)(S3C2443_BASE_REG_PA_IOPORT);
int vtg;
UINT32 backup_gpfdat;
UINT32 backup_gpgdat;
UINT32 backup_gpbdat;
UINT32 backup_gpfcon;
UINT32 backup_gpfudp;
UINT32 backup_gpgcon;
UINT32 backup_gpgudp;
UINT32 backup_gpbcon;
UINT32 backup_gpbudp;
//////////////////////////////////////////////
// GPF3 GPF4 GPF5 GPF6 GPF7
// D4 D3 D2 D1 D0
// 0 0 0 0 0 // 1.75V
// 0 0 0 0 1 // 1.70V
// 0 0 0 1 0 // 1.65V
// 0 0 0 1 1 // 1.60V
// 0 0 1 0 0 // 1.55V
// 0 0 1 0 1 // 1.50V
// 0 0 1 1 0 // 1.45V, Max. voltage of S3C2443 VDDarm
// 0 0 1 1 1 // 1.40V
// 0 1 0 0 0 // 1.35V
// 0 1 0 0 1 // 1.30V
// 0 1 0 1 0 // 1.25V
// 0 1 0 1 1 // 1.20V
// 0 1 1 0 0 // 1.15V
// 0 1 1 0 1 // 1.10V
// 0 1 1 1 0 // 1.05V
// 0 1 1 1 1 // 1.00V
// 1 0 0 0 1 // 0.95V
// 1 0 0 1 1 // 0.90V
// 1 0 1 0 1 // 0.85V
// 1 0 1 1 1 // 0.80V
vtg = voltage;
// port backup
backup_gpfdat = s2443IOP->GPFDAT;
s2443IOP->GPFDAT &=~(0x1f<<3);
// RETAILMSG(1,(TEXT("P GPFDAT: %x, GPFCON: %x, GPFUDP: %x, GPGDAT: %x, GPGCON: %x, GPGUDP: %x, GPBDAT: %x, GPBCON: %x, GPBUDP: %x\n"),
// s2443IOP->GPFDAT, s2443IOP->GPFCON, s2443IOP->GPFUDP,
// s2443IOP->GPGDAT, s2443IOP->GPGCON, s2443IOP->GPGUDP,
// s2443IOP->GPBDAT, s2443IOP->GPBCON, s2443IOP->GPBUDP));
backup_gpfudp = s2443IOP->GPFUDP;
backup_gpgudp = s2443IOP->GPGUDP;
backup_gpbudp = s2443IOP->GPBUDP;
// port setting
// GPF3:D0, GPF4:D1, GPF5:D2, GPF6:D3, GPF7:D4, GPB8:Latch enable
// in EVT0, GPF4~7 is muxed with LED, GPF3 is muxed with KEYBOARD
s2443IOP->GPFUDP = s2443IOP->GPFUDP /*& ~(0x3ff<<6)*/|(0x3ff<<6); // pull updown disable, Do not clear, clearing bit is same to pull-uping
s2443IOP->GPGUDP = s2443IOP->GPGUDP /*& ~(0xf<<12)*/|(0xf<<12); // pull down disable, clearing bit is same to pull-uping
s2443IOP->GPBUDP = s2443IOP->GPBUDP /*& ~(0x3<<4)*/|(0x3<<4); // pull down disable, clearing bit is same to pull-uping
switch (vtg)
{
case V135:
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(0<<5)|(0<<6)|(0<<7); //D4~0
break;
case V100:
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7); //D4~0
break;
case V175:
s2443IOP->GPFDAT |= (0<<3)|(0<<4)|(0<<5)|(0<<6)|(0<<7); //D4~0
break;
case V170:
s2443IOP->GPFDAT |= (0<<3)|(0<<4)|(0<<5)|(0<<6)|(1<<7); //D4~0
break;
case V165:
s2443IOP->GPFDAT |= (0<<3)|(0<<4)|(0<<5)|(1<<6)|(0<<7); //D4~0
break;
case V160:
s2443IOP->GPFDAT |= (0<<3)|(0<<4)|(0<<5)|(1<<6)|(1<<7); //D4~0
break;
case V155:
s2443IOP->GPFDAT |= (0<<3)|(0<<4)|(1<<5)|(0<<6)|(0<<7); //D4~0
break;
case V150:
s2443IOP->GPFDAT |= (0<<3)|(0<<4)|(1<<5)|(0<<6)|(1<<7); //D4~0
break;
case V145:
s2443IOP->GPFDAT |= (0<<3)|(0<<4)|(1<<5)|(1<<6)|(0<<7); //D4~0
break;
case V140:
s2443IOP->GPFDAT |= (0<<3)|(0<<4)|(1<<5)|(1<<6)|(1<<7); //D4~0
break;
case V130:
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(0<<5)|(0<<6)|(1<<7); //D4~0
break;
case V125:
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(0<<5)|(1<<6)|(0<<7); //D4~0
break;
case V120:
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(0<<5)|(1<<6)|(1<<7); //D4~0
break;
case V115:
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(1<<5)|(0<<6)|(0<<7); //D4~0
break;
case V110:
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(1<<5)|(0<<6)|(1<<7); //D4~0
break;
case V105:
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(1<<5)|(1<<6)|(0<<7); //D4~0
break;
case V95:
s2443IOP->GPFDAT |= (1<<3)|(0<<4)|(0<<5)|(0<<6)|(1<<7); //D4~0
break;
case V90:
s2443IOP->GPFDAT |= (1<<3)|(0<<4)|(0<<5)|(1<<6)|(1<<7); //D4~0
break;
case V85:
s2443IOP->GPFDAT |= (1<<3)|(0<<4)|(1<<5)|(0<<6)|(1<<7); //D4~0
break;
case V80:
s2443IOP->GPFDAT |= (1<<3)|(0<<4)|(1<<5)|(1<<6)|(1<<7); //D4~0
break;
default: // 1.35V
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(0<<5)|(0<<6)|(0<<7); //D4~0
break;
}
// RETAILMSG(1,(TEXT("X GPFDAT: %x, GPFCON: %x, GPFUDP: %x, GPGDAT: %x, GPGCON: %x, GPGUDP: %x, GPBDAT: %x, GPBCON: %x, GPBUDP: %x\n"),
// s2443IOP->GPFDAT, s2443IOP->GPFCON, s2443IOP->GPFUDP,
// s2443IOP->GPGDAT, s2443IOP->GPGCON, s2443IOP->GPGUDP,
// s2443IOP->GPBDAT, s2443IOP->GPBCON, s2443IOP->GPBUDP));
s2443IOP->GPGDAT|=(1<<7); // Output enable
// on DVS, GPG7 must be 'high' --> non high Z output
if(pwr) s2443IOP->GPGDAT&=~(1<<6); //Arm Latch enable
else s2443IOP->GPBDAT&=~(1<<2); //Int Latch enable
s2443IOP->GPGDAT|=(1<<7); // delay, LE propagation dealy typ. 5.3ns
if(pwr) s2443IOP->GPGDAT|=(1<<6); //Arm Latch disable
else s2443IOP->GPBDAT|=(1<<2); //Int Latch diaable
// backup_gpfcon = s2443IOP->GPFCON;
backup_gpgcon = s2443IOP->GPGCON;
// backup_gpbcon = s2443IOP->GPBCON;
s2443IOP->GPFCON = (s2443IOP->GPFCON & ~(0x3ff<<6)) | (0x155<<6); // GPF3 ~ 7(Data5 ~ 1): OUTPUT
s2443IOP->GPGCON = (s2443IOP->GPGCON & ~(0xf<<12)) | (0x5<<12); // GPG6(nARM_REG_LE), GPG7(CORE_REG_OE): OUTPUT
s2443IOP->GPBCON = (s2443IOP->GPBCON & ~(0x3<<4)) | (0x1<<4); // GPB2(nINT_REG_LE): OUTPUT
// s2443IOP->GPFCON = backup_gpfcon;
// s2443IOP->GPGCON = backup_gpgcon;
// s2443IOP->GPBCON = backup_gpbcon;
// s2443IOP->GPFUDP = backup_gpfudp;
// s2443IOP->GPGUDP = backup_gpgudp;
// s2443IOP->GPBUDP = backup_gpbudp;
// s2443IOP->GPFDAT = backup_gpfdat; // restore backuped GPFDAT's value
// s2443IOP->GPGDAT = backup_gpgdat; // restore backuped GPGDAT's value
// s2443IOP->GPBDAT = backup_gpbdat; // restore backuped GPBDAT's value
// RETAILMSG(1,(TEXT("R GPFDAT: %x, GPFCON: %x, GPFUDP: %x, GPGDAT: %x, GPGCON: %x, GPGUDP: %x, GPBDAT: %x, GPBCON: %x, GPBUDP: %x\n"),
// s2443IOP->GPFDAT, s2443IOP->GPFCON, s2443IOP->GPFUDP,
// s2443IOP->GPGDAT, s2443IOP->GPGCON, s2443IOP->GPGUDP,
// s2443IOP->GPBDAT, s2443IOP->GPBCON, s2443IOP->GPBUDP));
}
void Max1718_Init() // add 060624
{
volatile S3C2443_IOPORT_REG *s2443IOP = (S3C2443_IOPORT_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_IOPORT, FALSE);
//////////////////////////////////////////////
// GPF3 GPF4 GPF5 GPF6 GPF7
// D4 D3 D2 D1 D0
// 0 0 0 0 0 // 1.75V
// 0 0 0 0 1 // 1.70V
// 0 0 0 1 0 // 1.65V
// 0 0 0 1 1 // 1.60V
// 0 0 1 0 0 // 1.55V
// 0 0 1 0 1 // 1.50V
// 0 0 1 1 0 // 1.45V, Max. voltage of S3C2443 VDDarm
// 0 0 1 1 1 // 1.40V
// 0 1 0 0 0 // 1.35V
// 0 1 0 0 1 // 1.30V
// 0 1 0 1 0 // 1.25V
// 0 1 0 1 1 // 1.20V
// 0 1 1 0 0 // 1.15V
// 0 1 1 0 1 // 1.10V
// 0 1 1 1 0 // 1.05V
// 0 1 1 1 1 // 1.00V
// 1 0 0 0 1 // 0.95V
// 1 0 0 1 1 // 0.90V
// 1 0 1 0 1 // 0.85V
// 1 0 1 1 1 // 0.80V
#ifdef EVT1
#if 0
s2443IOP->GPFCON = s2443IOP->GPFCON & ~(0x3ff<<6)|(0x155<<6); // GPF3 ~ 7(Data5 ~ 1): OUTPUT
s2443IOP->GPFUDP = s2443IOP->GPFUDP & ~(0x3ff<<6)|(0x155<<6); // pull down disable
s2443IOP->GPGCON = s2443IOP->GPGCON & ~(0xf<<12)|(0x5<<12); // GPG6(nARM_REG_LE), GPG7(CORE_REG_OE): OUTPUT
s2443IOP->GPGUDP = s2443IOP->GPGUDP & ~(0xf<<12)|(0x5<<12); // pull down disable
s2443IOP->GPBCON = s2443IOP->GPBCON & ~(0x3<<4)|(0x1<<4); // GPB2(nINT_REG_LE): OUTPUT
s2443IOP->GPBUDP = s2443IOP->GPBUDP & ~(0x3<<4)|(0x1<<4); // pull down disable
#else
s2443IOP->GPFCON = s2443IOP->GPFCON & ~(0x3ff<<6)|(0x155<<6); // GPF3 ~ 7(Data5 ~ 1): OUTPUT
s2443IOP->GPFUDP = s2443IOP->GPFUDP | (0x3ff<<6); // disable pull down disable
s2443IOP->GPGCON = s2443IOP->GPGCON & ~(0xf<<12)|(0x5<<12); // GPG6(nARM_REG_LE), GPG7(CORE_REG_OE): OUTPUT
s2443IOP->GPGUDP = s2443IOP->GPGUDP | (0xf<<12); // pull down disable
s2443IOP->GPBCON = s2443IOP->GPBCON & ~(0x3<<4)|(0x1<<4); // GPB2(nINT_REG_LE): OUTPUT
s2443IOP->GPBUDP = s2443IOP->GPBUDP | (0x3<<4); // pull down disable
#endif
#else
s2443IOP->GPFCON = (s2443IOP->GPFCON & ~(0x3ff<<6)) | (0x155<<6); // GPF3 ~ 7(Data5 ~ 1): OUTPUT
s2443IOP->GPFUDP = (s2443IOP->GPFUDP & ~(0x3ff<<6)) | (0x2AA<<6); // pull down disable
s2443IOP->GPGCON = (s2443IOP->GPGCON & ~(0xf<<12)) | (0x5<<12); // GPG6(nARM_REG_LE), GPG7(CORE_REG_OE): OUTPUT
s2443IOP->GPGUDP = (s2443IOP->GPGUDP & ~(0xf<<12)) | (0xA<<12); // pull down disable
s2443IOP->GPBCON = (s2443IOP->GPBCON & ~(0x3<<4)) | (0x1<<4); // GPB2(nINT_REG_LE): OUTPUT
s2443IOP->GPBUDP = (s2443IOP->GPBUDP & ~(0x3<<4)) | (0x2<<4); // pull down disable
#endif
s2443IOP->GPGDAT|=(1<<7); //Output enable
s2443IOP->GPGDAT &= ~(1<<6); //Arm Latch enable
s2443IOP->GPFDAT &= ~(0x1f<<3);
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(0<<5)|(0<<6)|(0<<7); //1.35V
s2443IOP->GPGDAT |= (1<<6); //Arm Latch disable
s2443IOP->GPBDAT &= ~(1<<2); //Int Latch enable
s2443IOP->GPFDAT &= ~(0x1f<<3);
s2443IOP->GPFDAT |= (0<<3)|(1<<4)|(0<<5)|(1<<6)|(1<<7); //1.2V
s2443IOP->GPBDAT |= (1<<2); //Int Latch diaable
}
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