fmd.cpp

2443 wince5.0 bsp, source code

			NF_CLEAR_RB();
			NF_CMD(CMD_WRITE2);				// Send write confirm command.
			NF_DETECT_RB();

			#if 0
			do
			{
				NF_CMD(CMD_STATUS);
				Status = NF_RDDATA_BYTE();					// Read command status.
			}while(!(Status & STATUS_READY));
			#else
			NF_CMD(CMD_STATUS);
			Status = NF_RDDATA_BYTE();					// Read command status.
			#endif
			
			if (Status & STATUS_ERROR)
			{
				NF_nFCE_H();							// Deselect the flash chip.
				SetKMode (bLastMode);
				return(FALSE);
			}
			pSectorInfoBuff++;
		}
		else 		// Main area+Spare area.
		{
			NF_CMD(CMD_READ);					 		// Send read command.
			NF_CMD(CMD_WRITE);							// Send write command.
			NF_ADDR(0);									// Column = 0.
			NF_ADDR(blockPage		 & 0xff);			// Page address.
			NF_ADDR((blockPage >>  8) & 0xff);
			if (NEED_EXT_ADDR)
				NF_ADDR((blockPage >> 16) & 0xff);  

			//  Special case to handle un-aligned buffer pointer.
			NF_RSTECC();
			NF_MECC_UnLock();
			if( ((DWORD) pSectorBuff) & 0x3) 
			{
				WrPage512Unalign (pSectorBuff);
			}
			else
			{
				WrPage512(pSectorBuff);					// Write page/sector data.
			}
			NF_MECC_Lock();
			
			// Write the SectorInfo data to the media.
			// Spare area[7:0]
			if(pSectorInfoBuff)
			{
				WrPageInfo((PBYTE)pSectorInfoBuff);
				pSectorInfoBuff++;
			}
			else	// Make sure we advance the Flash's write pointer (even though we aren't writing the SectorInfo data)
			{
				BYTE TempInfo[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
				WrPageInfo(TempInfo);
			}

			// Write the SectorInfo data to the media.
			// Spare area[11:8]
			// Get the ECC data from status register.
			MECC = NF_RDMECC0();
			// Now, Write the ECC data to Spare area[11:8]
			NF_WRDATA_BYTE((UCHAR)((MECC	  ) & 0xff));		// Spare area offset 8
			NF_WRDATA_BYTE((UCHAR)((MECC >>  8) & 0xff));	// Spare area offset 9
			NF_WRDATA_BYTE((UCHAR)((MECC >> 16) & 0xff));	// Spare area offset 10
			NF_WRDATA_BYTE((UCHAR)((MECC >> 24) & 0xff));	// Spare area offset 11

			NF_CLEAR_RB();
			NF_CMD(CMD_WRITE2);							// Send write confirm command.
			NF_DETECT_RB();
			
			do
			{
				NF_CMD(CMD_STATUS);
				Status = NF_RDDATA_BYTE();					// Read command status.
			}while(!(Status & STATUS_READY));

			if (Status & STATUS_ERROR)
			{
				NF_nFCE_H();							// Deselect the flash chip.
				SetKMode (bLastMode);
				return(FALSE);
			}
			pSectorBuff += NAND_PAGE_SIZE;
		}
		++SectorAddr;
	}
	NF_nFCE_H();										// Deselect the flash chip.

	SetKMode (bLastMode);
	
	return(TRUE);
}


BOOL FMD_LB_EraseBlock(BLOCK_ID blockID, int mode)
{
	BOOL    bRet = TRUE;
	DWORD   dwPageID = blockID << LB_NAND_LOG_2_PAGES_PER_BLOCK;

//	RETAILMSG(1, (TEXT("FMD_LB_EraseBlock 0x%x \r\n"), blockID));

	BOOL bLastMode = SetKMode(TRUE);

    //  Enable the chip
	NF_nFCE_L();						// Select the flash chip.

	NF_CLEAR_RB();

    //  Issue command
	NF_CMD(CMD_ERASE);

    //  Set up address
	NF_ADDR((dwPageID) & 0xff);
	NF_ADDR((dwPageID >> 8) & 0xff);

#if 1
	if (NEED_EXT_ADDR) {
		NF_ADDR((dwPageID >> 16) & 0xff);
	}
#endif
	//  Complete erase operation
	NF_CMD(CMD_ERASE2);

	//  Wait for ready bit
	NF_DETECT_RB();	 // Wait tR(max 12us)

#if 1
	if ( NF_RDSTAT & STATUS_ILLACC )
	{
        	RETAILMSG(1, (TEXT("LB######## Error Erasing block (Illigar Access) %d!\n"), blockID));
		s2443NAND->NFSTAT =  STATUS_ILLACC;	// Write 1 to clear.
		bRet = FALSE;
	}
	else
#endif
	{
		//  Check the status
		NF_CMD(CMD_STATUS);

		if( NF_RDDATA_BYTE() & STATUS_ERROR) {
			RETAILMSG(1, (TEXT("LB######## Error Erasing block %d!\n"), blockID));
			bRet = FALSE;
		}
	}

	NF_nFCE_H();						// Select the flash chip.

	SetKMode(bLastMode);

	return bRet;
}

BOOL FMD_SB_EraseBlock(BLOCK_ID blockID, int mode)
{
	BOOL    bRet = TRUE;
	DWORD   dwPageID = blockID << SB_NAND_LOG_2_PAGES_PER_BLOCK;

	//RETAILMSG(1, (TEXT("FMD_sb_EraseBlock 0x%x \r\n"), blockID));

	BOOL bLastMode = SetKMode(TRUE);

    //  Enable the chip
	NF_nFCE_L();						// Select the flash chip.

    //  Issue command
	NF_CMD(CMD_ERASE);

    //  Set up address
	NF_ADDR((dwPageID) & 0xff);
	NF_ADDR((dwPageID >> 8) & 0xff);

	if (NEED_EXT_ADDR) {
		NF_ADDR((dwPageID >> 16) & 0xff);
	}
	NF_CLEAR_RB();
	//  Complete erase operation
	NF_CMD(CMD_ERASE2);

	//  Wait for ready bit
	NF_DETECT_RB();	 // Wait tR(max 12us)
#if 1
	if ( NF_RDSTAT & STATUS_ILLACC )
	{
        	RETAILMSG(1, (TEXT("SB######## Error Erasing block (Illigar Access) %d!\n"), blockID));
		s2443NAND->NFSTAT =  STATUS_ILLACC;	// Write 1 to clear.
		bRet = FALSE;
	}
	else
#endif		
	{
		//  Check the status
		NF_CMD(CMD_STATUS);

		if( NF_RDDATA_BYTE() & STATUS_ERROR) {
			RETAILMSG(1, (TEXT("SB######## Error Erasing block %d!\n"), blockID));
			bRet = FALSE;
		}
	}

	NF_nFCE_H();						// Select the flash chip.

	SetKMode(bLastMode);

	return bRet;
}


DWORD FMD_LB_GetBlockStatus(BLOCK_ID blockID, int mode)
{
    SECTOR_ADDR sectorAddr = blockID << LB_NAND_LOG_2_PAGES_PER_BLOCK;
    SectorInfo SI;
    DWORD dwResult = 0;

//	RETAILMSG(1, (TEXT("FMD_LB_GetBlockStatus (0x%x)0x%x \r\n"), blockID, sectorAddr));
	BOOL bLastMode = SetKMode(TRUE);

#if 0
	if (LB_IsBlockBad(sectorAddr,0))
		return BLOCK_STATUS_BAD;	
#endif

	if(!FMD_LB_ReadSector(sectorAddr <<2, NULL, &SI, 1, mode))
	{
	        return BLOCK_STATUS_UNKNOWN;
	}

	if(!(SI.bOEMReserved & OEM_BLOCK_READONLY))
	{
		dwResult |= BLOCK_STATUS_READONLY;
	}

#if MAGNETO		
    if( sectorAddr < pBSPArgs->nfsblk )
	{
        dwResult |= BLOCK_STATUS_READONLY;
	}
#endif
	
	if (!(SI.bOEMReserved & OEM_BLOCK_RESERVED))
		dwResult |= BLOCK_STATUS_RESERVED;


    if(SI.bBadBlock != 0xFF)
	{
        dwResult |= BLOCK_STATUS_BAD;
	}

	SetKMode(bLastMode);

    return dwResult;
}

DWORD FMD_SB_GetBlockStatus(BLOCK_ID blockID, int mode)
{
    SECTOR_ADDR sectorAddr = blockID << SB_NAND_LOG_2_PAGES_PER_BLOCK;
    SectorInfo SI;
    DWORD dwResult = 0;

	BOOL bLastMode = SetKMode(TRUE);

	//RETAILMSG(1, (TEXT("FMD_SB_GetBlockStatus (0x%x)0x%x \r\n"), blockID, sectorAddr));

	if(!FMD_SB_ReadSector(sectorAddr, NULL, &SI, 1, mode))
	{
        return BLOCK_STATUS_UNKNOWN;
	}

    if(!(SI.bOEMReserved & OEM_BLOCK_READONLY))
	{
        dwResult |= BLOCK_STATUS_READONLY;
	}

#if MAGNETO	
    if( blockID/8 < pBSPArgs->nfsblk )
	{
		RETAILMSG(1,(TEXT("pBSPArgs->nfsblk=%d\r\n"),pBSPArgs->nfsblk));
        	dwResult |= BLOCK_STATUS_READONLY;
	}
#endif

    if(SI.bBadBlock != 0xFF)
	{
        dwResult |= BLOCK_STATUS_BAD;
	}
	
	SetKMode(bLastMode);
	
    return dwResult;

}

BOOL FMD_LB_SetBlockStatus(BLOCK_ID blockID, DWORD dwStatus, int mode)
{
	BYTE bStatus = 0;

    if(dwStatus & BLOCK_STATUS_BAD)
	{
        if(!LB_MarkBlockBad (blockID, mode))
        {
            return FALSE;
        }
    }

    // We don't currently support setting a block to read-only, so fail if request is
    // for read-only and block is not currently read-only.
    if(dwStatus & BLOCK_STATUS_READONLY)
	{
        if(!(FMD_LB_GetBlockStatus(blockID, mode) & BLOCK_STATUS_READONLY))
        {
            return FALSE;
        }
    }

    return TRUE;
}

BOOL FMD_SB_SetBlockStatus(BLOCK_ID blockID, DWORD dwStatus, int mode)
{
    SECTOR_ADDR sectorAddr = blockID << SB_NAND_LOG_2_PAGES_PER_BLOCK;
	BYTE bStatus = 0;


	//RETAILMSG(1,(TEXT("#### FMD_DRIVER:::FMD_sbsetblock \r\n")));
	
    if(dwStatus & BLOCK_STATUS_BAD)
	{
        if(!SB_MarkBlockBad (blockID, mode))
        {
            return FALSE;
        }
    }

    // We don't currently support setting a block to read-only, so fail if request is
    // for read-only and block is not currently read-only.
    if(dwStatus & BLOCK_STATUS_READONLY)
	{
        if(!(FMD_SB_GetBlockStatus(blockID, mode) & BLOCK_STATUS_READONLY))
        {
            return FALSE;
        }
    }

    return TRUE;
}


BOOL LB_MarkBlockBad(BLOCK_ID blockID, int mode)
{
	DWORD   dwStartPage = blockID << LB_NAND_LOG_2_PAGES_PER_BLOCK;
	BOOL    bRet = TRUE;

//	RETAILMSG(1, (TEXT("LB_MarkBlockBad 0x%x \r\n"), dwStartPage));
	BOOL bLastMode = SetKMode(TRUE);

    //  Enable chip
	NF_nFCE_L();
	NF_CLEAR_RB();

    //  Issue command
    //  We are dealing with spare area
	NF_CMD(CMD_WRITE);

    //  Set up address
	NF_ADDR((2048+VALIDADDR)&0xff);
	NF_ADDR(((2048+VALIDADDR)>>8)&0xff);
	NF_ADDR((dwStartPage) & 0xff);
	NF_ADDR((dwStartPage >> 8) & 0xff);
	if (LB_NEED_EXT_ADDR) {
		NF_ADDR((dwStartPage >> 16) & 0xff);
	}

	NF_WRDATA_BYTE(BADBLOCKMARK);

    //  Copmlete the write
	NF_CMD(CMD_WRITE2);

    //  Wait for RB
	NF_DETECT_RB();	 // Wait tR(max 12us)

#if 1
	if ( NF_RDSTAT & STATUS_ILLACC )
	{
		RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page (Illigar Access) %d!\n")));
		s2443NAND->NFSTAT =  STATUS_ILLACC;	// Write 1 to clear.
       	bRet = FALSE;
	}
	else
#endif		
	{
		//  Check the status of program
		NF_CMD(CMD_STATUS);

		if( NF_RDDATA_BYTE() & STATUS_ERROR) {
			RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page %d!\n")));
			bRet = FALSE;
		}
	}

    //  Disable chip select
    NF_nFCE_H();

    SetKMode(bLastMode);
    return bRet;
}

BOOL SB_MarkBlockBad(BLOCK_ID blockID, int mode)
{
	DWORD   dwStartPage = blockID << SB_NAND_LOG_2_PAGES_PER_BLOCK;
	BOOL    bRet = TRUE;

	//RETAILMSG(1, (TEXT("SB_MarkBlockBad 0x%x \r\n"), dwStartPage));

	BOOL bLastMode = SetKMode(TRUE);

    //  Enable chip
	NF_nFCE_L();
	NF_CLEAR_RB();

    //  Issue command
    //  We are dealing with spare area
	NF_CMD(CMD_READ2);
	NF_CMD(CMD_WRITE);

    //  Set up address
	NF_ADDR(VALIDADDR);
	NF_ADDR((dwStartPage) & 0xff);
	NF_ADDR((dwStartPage >> 8) & 0xff);
	if (SB_NEED_EXT_ADDR) {
		NF_ADDR((dwStartPage >> 16) & 0xff);
	}

	NF_WRDATA_BYTE(BADBLOCKMARK);

    //  Copmlete the write
	NF_CMD(CMD_WRITE2);

    //  Wait for RB
	NF_DETECT_RB();	 // Wait tR(max 12us)

#if 1
	if ( NF_RDSTAT & STATUS_ILLACC )
	{
		RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page (Illigar Access) %d!\n")));
		s2443NAND->NFSTAT =  STATUS_ILLACC;	// Write 1 to clear.
       	bRet = FALSE;
	}
	else
#endif 		
	{
		//  Check the status of program
		NF_CMD(CMD_STATUS);

		if( NF_RDDATA_BYTE() & STATUS_ERROR) {
			RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page %d!\n")));
			bRet = FALSE;
		}
	}

    //  Disable chip select
    NF_nFCE_H();

    SetKMode(bLastMode);
    return bRet;
}

BOOL LB_IsBlockBad(BLOCK_ID blockID, int mode)
{
    DWORD   dwPageID = blockID << LB_NAND_LOG_2_PAGES_PER_BLOCK;
    BOOL    bRet = FALSE;
    BYTE    wFlag;

    BOOL bLastMode = SetKMode(TRUE);

    //  Enable the chip
    NF_nFCE_L();
    NF_CLEAR_RB();

    //  Issue the command
    NF_CMD(CMD_READ);

    //  Set up address
    NF_ADDR((2048+VALIDADDR)&0xff);
    NF_ADDR(((2048+VALIDADDR)>>8)&0xff);
    NF_ADDR((dwPageID) & 0xff);
    NF_ADDR((dwPageID >> 8) & 0xff);

    if (LB_NEED_EXT_ADDR) {
        NF_ADDR((dwPageID >> 16) & 0xff);
    }

	NF_CMD(CMD_READ3);

    //  Wait for Ready bit
	NF_DETECT_RB();	 // Wait tR(max 12us)

    //  Now get the byte we want
    wFlag = (BYTE)(NF_RDDATA_BYTE()&0xff);

    if(wFlag != 0xff) {
		RETAILMSG(1, (TEXT("FMDLB: IsBlockBad - Page #: 0x%x \r\n"), dwPageID));
        bRet = TRUE;
    }

    //  Disable the chip
    NF_nFCE_H();

    SetKMode(bLastMode);
    return bRet;
}

BOOL SB_IsBlockBad(BLOCK_ID blockID, int mode)
{
    DWORD   dwPageID = blockID << SB_NAND_LOG_2_PAGES_PER_BLOCK;
    BOOL    bRet = FALSE;
    BYTE    wFlag;

    //RETAILMSG(1,(TEXT("#### FMD_DRIVER:::FMD_sbisblockbad \r\n")));

    BOOL bLastMode = SetKMode(TRUE);

    //  Enable the chip
    NF_nFCE_L();
	NF_CLEAR_RB();
    //  Issue the command
    NF_CMD(CMD_READ2);

    //  Set up address
    NF_ADDR(VALIDADDR);
    NF_ADDR((dwPageID) & 0xff);
    NF_ADDR((dwPageID >> 8) & 0xff);

    if (SB_NEED_EXT_ADDR) {
        NF_ADDR((dwPageID >> 16) & 0xff);
    }

    //  Wait for Ready bit
	NF_DETECT_RB();	 // Wait tR(max 12us)

    //  Now get the byte we want
    wFlag = (BYTE) NF_RDDATA_BYTE();

    if(wFlag != 0xff) {
	RETAILMSG(1, (TEXT("FMDSB: IsBlockBad - Page #: 0x%x \r\n"), dwPageID));
        bRet = TRUE;
    }

		
    //  Disable the chip
    NF_nFCE_H();

    SetKMode(bLastMode);
    return bRet;
}