📄 fmd.cpp
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int NewSectorAddr = startSectorAddr/4;
//RETAILMSG(1,(TEXT("#### FMD_DRIVER:::FMD_LB_READSECTOR %x %x\r\n"),startSectorAddr,NewDataAddr));
if (!pSectorBuff && !pSectorInfoBuff)
return(FALSE);
if ( dwNumSectors > 1 )
{
RETAILMSG(1, (TEXT("######## FATAL ERROR => FMD::FMD_ReadSector->dwNumsectors is bigger than 1. \r\n")));
return FALSE;
}
BOOL bLastMode = SetKMode(TRUE);
if (!pSectorBuff)
{
NAND_LB_ReadSectorInfo(startSectorAddr, pSectorInfoBuff, mode);
return TRUE;
}
NF_RSTECC();
NF_MECC_UnLock();
NF_nFCE_L();
NF_CLEAR_RB();
NF_CMD(CMD_READ); // Send read command.
NF_ADDR((NewDataAddr)&0xff);
NF_ADDR(((NewDataAddr)>>8)&0xff);
NF_ADDR((NewSectorAddr) & 0xff);
NF_ADDR((NewSectorAddr >> 8) & 0xff);
#if 1 // hsjang 060613
if (NEED_EXT_ADDR)
NF_ADDR((NewSectorAddr >> 16) & 0xff);
#endif
NF_CMD(CMD_READ3); // 2nd command
NF_DETECT_RB(); // Wait for command to complete.
if( ((DWORD) pSectorBuff) & 0x3)
{
for(i=0; i<NAND_PAGE_SIZE/sizeof(DWORD); i++) {
rddata = (DWORD) NF_RDDATA_WORD();
pSectorBuff[i*4+0] = (BYTE)(rddata & 0xff);
pSectorBuff[i*4+1] = (BYTE)(rddata>>8 & 0xff);
pSectorBuff[i*4+2] = (BYTE)(rddata>>16 & 0xff);
pSectorBuff[i*4+3] = (BYTE)(rddata>>24 & 0xff);
}
}
else
{
#if 1
RdPage512(pSectorBuff); // Read page/sector data.
#else
for(volatile int i=0; i<512; i++)
{
for(volatile int j=0; j<5; j++);
*pSectorBuff++ = (BYTE)s2443NAND->NFDATA;
}
#endif
}
NF_MECC_Lock();
NF_CMD(CMD_RDO);
// Set up address
NF_ADDR((NewSpareAddr)&0xff);
NF_ADDR(((NewSpareAddr)>>8)&0xff);
NF_CMD(CMD_RDO2);
#if 0
if (pSectorInfoBuff)
{
RdPageInfo((PBYTE)pSectorInfoBuff); // Read page/sector information.
pSectorInfoBuff ++;
}
#else
if (pSectorInfoBuff)
{
// RdPageInfo((PBYTE)pSectorInfoBuff); // Read page/sector information.
rddata= NF_RDDATA_WORD();
pSectorInfoBuff->dwReserved1 = rddata;
//RETAILMSG(1, (TEXT("111Spare DATA you want it 0x%x\r\n"),rddata));
rddata= NF_RDDATA_WORD();
//RETAILMSG(1, (TEXT("Spare DATA you want it 0x%x\r\n"),rddata));
pSectorInfoBuff->bOEMReserved = (BYTE) (rddata & 0xff);;
// Read the bad block mark
pSectorInfoBuff->bBadBlock = (BYTE) ((rddata>>8) & 0xff);
// Second reserved field (WORD)
pSectorInfoBuff->wReserved2 = (WORD) ((rddata>>16) & 0xffff);
// pSectorInfoBuff->wReserved2 |= ((BYTE) NF_DATA_R());
}
#endif
else
{
#if 0 // hsjang 060613
BYTE TempInfo[8];
RdPageInfo(TempInfo); // Read page/sector information.
#endif
for(i=0; i<sizeof(SectorInfo)/sizeof(DWORD); i++)
rddata = (DWORD) NF_RDDATA_WORD(); // read and trash the data
}
for(i=0; i<2; i++) {
rddata = (DWORD) NF_RDDATA_WORD();
//RETAILMSG(1, (TEXT("333Spare DATA you want it 0x%x\r\n"),rddata));
// RETAILMSG(1, (TEXT("rddata 0x%x \r\n"), rddata));
eccBuf[i*4+0] = (BYTE)(rddata & 0xff);
eccBuf[i*4+1] = (BYTE)(rddata>>8 & 0xff);
eccBuf[i*4+2] = (BYTE)(rddata>>16 & 0xff);
eccBuf[i*4+3] = (BYTE)(rddata>>24 & 0xff);
}
// Mecc0 = READ_REGISTER_ULONG(pNFMECC0);
// Compare with the ECC generated from the HW
NF_WRMECCD0( (DWORD)((DWORD)(eccBuf[3]<<24) | (DWORD)(eccBuf[2]<<16) |(DWORD)(eccBuf[1]<<8) | (DWORD)(eccBuf[0]&0xff)));
//NF_WRMECCD1( (DWORD)((DWORD)(eccBuf[3]<<8) | (DWORD)(eccBuf[2]&0xff)));
if (NF_RDESTST & 0x3)
{
RETAILMSG(1,(TEXT("ECC error reg:%x rd:%x(NF_RDESTST:%x)\r\n"),NF_RDMECC0(),rddata, NF_RDESTST));
NF_nFCE_H(); // Deselect the flash chip.
SetKMode (bLastMode);
return FALSE;
}
NF_nFCE_H();
//RETAILMSG(1, (TEXT(".")));
SetKMode (bLastMode);
return(TRUE);
}
void NAND_LB_ReadSectorInfo(SECTOR_ADDR sectorAddr, PSectorInfo pInfo, int mode)
{
volatile DWORD rddata;
int NewSpareAddr = 2048 + 16*(sectorAddr%4);
int NewSectorAddr = sectorAddr/4;
BOOL bLastMode = SetKMode(TRUE);
#if 1
NF_nFCE_L();
NF_CLEAR_RB();
NF_CMD(CMD_READ); // Send read confirm command.
NF_ADDR((NewSpareAddr)&0xff);
NF_ADDR((NewSpareAddr>>8)&0xff);
NF_ADDR((NewSectorAddr)&0xff);
NF_ADDR((NewSectorAddr>>8) & 0xff);
#if 1 // hsjang 060613
if (NEED_EXT_ADDR)
NF_ADDR((NewSectorAddr >> 16) & 0xff);
#endif
NF_CMD(CMD_READ3);
NF_DETECT_RB();
pInfo->dwReserved1 = NF_RDDATA_WORD();
rddata = NF_RDDATA_WORD();
// OEM byte
pInfo->bOEMReserved = (BYTE) (rddata & 0xff);
// Read the bad block mark
pInfo->bBadBlock = (BYTE) ((rddata>>8) & 0xff);
// Second reserved field (WORD)
pInfo->wReserved2 = (WORD) ((rddata>>16) & 0xffff);
NF_nFCE_H();
#endif
SetKMode(bLastMode);
}
BOOL FMD_SB_ReadSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff, DWORD dwNumSectors,int mode)
{
ULONG SectorAddr = (ULONG)startSectorAddr;
ULONG MECC;
if (!pSectorBuff && !pSectorInfoBuff)
return(FALSE);
BOOL bLastMode = SetKMode(TRUE);
//RETAILMSG(1,(TEXT("#### FMD_DRIVER:::FMD_sbreadT \r\n")));
while (dwNumSectors--)
{
ULONG blockPage = (((SectorAddr / NAND_PAGE_CNT) * NAND_PAGE_CNT) | (SectorAddr % NAND_PAGE_CNT));
NF_RSTECC();
NF_MECC_UnLock();
NF_nFCE_L();
if (!pSectorBuff)
{
NF_CLEAR_RB();
NF_CMD(CMD_READ2); // Send read confirm command.
NF_ADDR(0); // Ignored.
NF_ADDR(blockPage & 0xff); // Page address.
NF_ADDR((blockPage >> 8) & 0xff);
if (NEED_EXT_ADDR)
NF_ADDR((blockPage >> 16) & 0xff);
NF_DETECT_RB();
RdPageInfo((PBYTE)pSectorInfoBuff); // Read page/sector information.
pSectorInfoBuff++;
}
else
{
NF_CLEAR_RB();
NF_CMD(CMD_READ); // Send read command.
NF_ADDR(0); // Column = 0.
NF_ADDR(blockPage & 0xff); // Page address.
NF_ADDR((blockPage >> 8) & 0xff);
if (NEED_EXT_ADDR)
NF_ADDR((blockPage >> 16) & 0xff);
NF_DETECT_RB(); // Wait for command to complete.
if( ((DWORD) pSectorBuff) & 0x3)
{
#if 1
RdPage512Unalign (pSectorBuff);
#else
for(volatile int i=0; i<512; i++)
{
for(volatile int j=0; j<5; j++);
*pSectorBuff++ = (BYTE)s2443NAND->NFDATA;
}
#endif
}
else
{
#if 1
RdPage512(pSectorBuff); // Read page/sector data.
#else
for(volatile int i=0; i<512; i++)
{
for(volatile int j=0; j<5; j++);
*pSectorBuff++ = (BYTE)s2443NAND->NFDATA;
}
#endif
}
NF_MECC_Lock();
if (pSectorInfoBuff)
{
RdPageInfo((PBYTE)pSectorInfoBuff); // Read page/sector information.
pSectorInfoBuff ++;
}
else
{
BYTE TempInfo[8];
RdPageInfo(TempInfo); // Read page/sector information.
}
MECC = NF_RDDATA_BYTE() << 0;
MECC |= NF_RDDATA_BYTE() << 8;
MECC |= NF_RDDATA_BYTE() << 16;
MECC |= (NF_RDMECC0() &0xff000000);
//MECC |= NF_RDDATA_BYTE() << 24;
NF_WRMECCD0( ((MECC&0xff00)<<8)|(MECC&0xff) );
NF_WRMECCD1( ((MECC&0xff000000)>>8)|((MECC&0xff0000)>>16) );
if (NF_RDESTST & 0x3)
{
RETAILMSG(1,(TEXT("ECC error reg:%x rd:%x(NF_RDESTST:%x)\r\n"),NF_RDMECC0(),MECC, NF_RDESTST));
NF_nFCE_H(); // Deselect the flash chip.
SetKMode (bLastMode);
return FALSE;
}
pSectorBuff += NAND_PAGE_SIZE;
}
NF_nFCE_H();
++SectorAddr;
}
//RETAILMSG(1, (TEXT(".")));
SetKMode (bLastMode);
return(TRUE);
}
BOOL FMD_LB_WriteSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff, DWORD dwNumSectors, int mode)
{
DWORD i;
BOOL bRet = TRUE;
volatile DWORD wrdata;
DWORD Mecc0;
int NewSpareAddr = 2048 + 16*(startSectorAddr%4);
int NewDataAddr = 512*(startSectorAddr%4);
int NewSectorAddr = startSectorAddr/4;
//RETAILMSG(1, (TEXT("FMD::FMD_LB_WriteSector 0x%x \r\n"), startSectorAddr));
// Sanity check
// BUGBUGBUG: I need to come back to support dwNumSectors > 1
//
if (!pSectorBuff && !pSectorInfoBuff)
return(FALSE);
if ( dwNumSectors > 1 )
{
RETAILMSG(1, (TEXT("######## FATAL ERROR => FMD::FMD_WriteSector->dwNumsectors is bigger than 1. \r\n")));
return FALSE;
}
BOOL bLastMode = SetKMode(TRUE);
if (!pSectorBuff)
{
NAND_LB_WriteSectorInfo(startSectorAddr, pSectorInfoBuff, mode);
return TRUE;
}
// Initialize ECC register
NF_RSTECC();
NF_MECC_UnLock();
// Enable Chip
NF_nFCE_L();
// Issue command
NF_CMD(CMD_WRITE);
// Setup address
NF_ADDR((NewDataAddr)&0xff);
NF_ADDR(((NewDataAddr)>>8)&0xff);
NF_ADDR((NewSectorAddr) & 0xff);
NF_ADDR((NewSectorAddr >> 8) & 0xff);
if (NEED_EXT_ADDR) {
NF_ADDR((NewSectorAddr >> 16) & 0xff);
}
// Special case to handle un-aligned buffer pointer.
//
if( ((DWORD) pSectorBuff) & 0x3) {
// Write the data
for(i=0; i<NAND_PAGE_SIZE/sizeof(DWORD); i++) {
wrdata = pSectorBuff[i*4+0];
wrdata |= pSectorBuff[i*4+1]<<8;
wrdata |= pSectorBuff[i*4+2]<<16;
wrdata |= pSectorBuff[i*4+3]<<24;
NF_WRDATA_WORD(wrdata);
}
}
else {
WrPage512(pSectorBuff);
}
// Read out the ECC value generated by HW
NF_MECC_Lock();
Mecc0 = NF_RDMECC0();
// Mecc1 = READ_REGISTER_ULONG(pNFMECC1);
NF_CMD(CMD_RDI);
NF_ADDR((NewSpareAddr)&0xff);
NF_ADDR(((NewSpareAddr)>>8)&0xff);
// Write the SectorInfo data to the media
// NOTE: This hardware is odd: only a byte can be written at a time and it must reside in the
// upper byte of a USHORT.
if(pSectorInfoBuff)
{
// Write the first reserved field (DWORD)
NF_WRDATA_WORD(pSectorInfoBuff->dwReserved1);
wrdata = (DWORD)(pSectorInfoBuff->bOEMReserved) | (((DWORD)(pSectorInfoBuff->bBadBlock) << 8)&0x0000ff00) | (((DWORD)(pSectorInfoBuff->wReserved2) << 16)&0xffff0000);
NF_WRDATA_WORD( wrdata );
}else
{
// Make sure we advance the Flash's write pointer (even though we aren't writing the SectorInfo data)
for(i=0; i<sizeof(SectorInfo)/sizeof(DWORD); i++)
{
NF_WRDATA_WORD(0xffffffff);
}
}
// Write the ECC value to the flash
NF_WRDATA_WORD(Mecc0);
// NF_DATA_W4(Mecc1);
// NF_DATA_W4(Mecc0);
NF_CLEAR_RB();
// Finish up the write operation
NF_CMD(CMD_WRITE2);
// Wait for RB
NF_DETECT_RB(); // Wait tR(max 12us)
#if 1
if ( NF_RDSTAT & STATUS_ILLACC )
{
RETAILMSG(1, (TEXT("FMD_WriteSector() ######## Error Programming page (Illigar Access) %d!\n"), startSectorAddr));
s2443NAND->NFSTAT = STATUS_ILLACC; // Write 1 to clear.
bRet = FALSE;
}
else
#endif
{
// Check the status
NF_CMD(CMD_STATUS);
if(NF_RDDATA_BYTE() & STATUS_ERROR) {
RETAILMSG(1, (TEXT("FMD_WriteSector() ######## Error Programming page %d!\n"), startSectorAddr));
bRet = FALSE;
}
}
// Disable the chip
NF_nFCE_H();
SetKMode(bLastMode);
return bRet;
}
BOOL NAND_LB_WriteSectorInfo(SECTOR_ADDR sectorAddr, PSectorInfo pInfo, int mode)
{
volatile DWORD wrdata;
BOOL bRet = TRUE;
int NewSpareAddr = 2048 + 16*(sectorAddr%4);
int NewSectorAddr = sectorAddr/4;
BOOL bLastMode = SetKMode(TRUE);
// Chip enable
NF_nFCE_L();
NF_CLEAR_RB();
// Write the command
// First, let's point to the spare area
NF_CMD(CMD_WRITE);
// Write the address
NF_ADDR((NewSpareAddr)&0xff);
NF_ADDR((NewSpareAddr>>8)&0xff);
NF_ADDR(NewSectorAddr & 0xff);
NF_ADDR((NewSectorAddr >> 8) & 0xff);
#if 1 // hsjang 060614
if (NEED_EXT_ADDR) {
NF_ADDR((NewSectorAddr >> 16) & 0xff);
}
#endif
// Now let's write the SectorInfo data
//
// Write the first reserved field (DWORD)
NF_WRDATA_WORD( pInfo->dwReserved1 );
wrdata = (DWORD)(pInfo->bOEMReserved) | (((DWORD)(pInfo->bBadBlock) << 8)&0x0000ff00) | (((DWORD)(pInfo->wReserved2) << 16)&0xffff0000);
NF_WRDATA_WORD( wrdata );
NF_CLEAR_RB();
// Issue the write complete command
NF_CMD(CMD_WRITE2);
// Check ready bit
NF_DETECT_RB(); // Wait tR(max 12us)
#if 1
if ( NF_RDSTAT & STATUS_ILLACC )
{
RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page (Illigar Access) %d!\n"), sectorAddr));
s2443NAND->NFSTAT = STATUS_ILLACC; // Write 1 to clear.
bRet = FALSE;
}
else
#endif
{
// Check the status of program
NF_CMD(CMD_STATUS);
if( NF_RDDATA_BYTE() & STATUS_ERROR) {
RETAILMSG(1, (TEXT("NAND_LB_WriteSectorInfo() ######## Error Programming page %d!\n"), sectorAddr));
bRet = FALSE;
}
}
NF_nFCE_H();
SetKMode(bLastMode);
return bRet;
}
BOOL FMD_SB_WriteSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff, DWORD dwNumSectors,int mode)
{
BYTE Status;
ULONG SectorAddr = (ULONG)startSectorAddr;
ULONG MECC;
if (!pSectorBuff && !pSectorInfoBuff)
return(FALSE);
//RETAILMSG(1,(TEXT("#### FMD_DRIVER:::FMD_sbwrite \r\n")));
BOOL bLastMode = SetKMode(TRUE);
NF_nFCE_L(); // Select the flash chip.
// NF_DETECT_RB();
while (dwNumSectors--)
{
ULONG blockPage = (((SectorAddr / NAND_PAGE_CNT) * NAND_PAGE_CNT) | (SectorAddr % NAND_PAGE_CNT));
if (!pSectorBuff) // Only spare area
{
// If we are asked just to write the SectorInfo, we will do that separately
NF_CMD(CMD_READ2); // Send read command.
NF_CMD(CMD_WRITE); // Send write command.
NF_ADDR(0); // Column = 0.
NF_ADDR(blockPage & 0xff); // Page address.
NF_ADDR((blockPage >> 8) & 0xff);
if (NEED_EXT_ADDR)
NF_ADDR((blockPage >> 16) & 0xff);
// Write the SectorInfo data to the media.
// Spare area[7:0]
WrPageInfo((PBYTE)pSectorInfoBuff);
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