s3c2443_cfcard.h

2443 wince5.0 bsp, source code

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
//  Header: s3c2443_cfcard.h
//
//  Defines the CF card controller CPU register layout and definitions.
//
#ifndef __S3C2443_cfcard_H
#define __S3C2443_cfcard_H

#if __cplusplus
    extern "C" 
    {
#endif

//------------------------------------------------------------------------------
//  Type: S3C2443_CFCARD_REG    
//
//  SSMC control registers. This register bank is located by the constant
//  CPU_BASE_REG_XX_CFCARD in the configuration file cpu_base_reg_cfg.h.
//

typedef struct {
	UINT8	PAD1[0x1800];
	UINT32 MUX_REG;
	UINT8	PAD2[0x100-0x4];
    UINT32 ATA_CONTROL;						// 0x4b800000
    UINT32 ATA_STATUS;						// 0x4b800004
    UINT32 ATA_COMMAND;                 	// 0x4b800008
    UINT32 ATA_SWRST;                 		// 0x4b80000c
    UINT32 ATA_IRQ;			        		// 0x4b800010
    UINT32 ATA_IRQ_MASK;					// 0x4b800014
    UINT32 ATA_CFG;							// 0x4b800018
    UINT32 ATA_RESERVED1;					// 0x4b80001c
    UINT32 ATA_RESERVED2;					// 0x4b800020
    UINT32 ATA_RESERVED3;					// 0x4b800024
    UINT32 ATA_RESERVED4;					// 0x4b800028
    UINT32 ATA_PIO_TIME;					// 0x4b80002c
    UINT32 ATA_UDMA_TIME;					// 0x4b800030
    UINT32 ATA_XFR_NUM;						// 0x4b800034
    UINT32 ATA_XFR_CNT;						// 0x4b800038
    UINT32 ATA_TBUF_START;                  // 0x4b80003c
    UINT32 ATA_TBUF_SIZE;					// 0x4b800040
    UINT32 ATA_SBUF_START;					// 0x4b800044
    UINT32 ATA_SBUF_SIZE;					// 0x4b800048
    UINT32 ATA_CADDR_TBUR;					// 0x4b80004c
    UINT32 ATA_CADDR_SBUF;					// 0x4b800050
    UINT32 ATA_PIO_DTR;						// 0x4b800054
    UINT32 ATA_PIO_FED;						// 0x4b800058
    UINT32 ATA_PIO_SCR;						// 0x4b80005c
    UINT32 ATA_PIO_LLR;						// 0x4b800060 
    UINT32 ATA_PIO_LMR;						// 0x4b800064
    UINT32 ATA_PIO_LHR;						// 0x4b800068
    UINT32 ATA_PIO_DVR;						// 0x4b80006c
    UINT32 ATA_PIO_CSD;						// 0x4b800070
    UINT32 ATA_PIO_DAD;						// 0x4b800074
    UINT32 ATA_PIO_READY;					// 0x4b800078
    UINT32 ATA_PIO_RDATA;					// 0x4b80007c
    UINT32 ATA_RESERVED6;					// 0x4b800080
    UINT32 ATA_RESERVED7;					// 0x4b800084
    UINT32 ATA_RESERVED8;					// 0x4b800088
    UINT32 ATA_RESERVED9;					// 0x4b80008c
    UINT32 BUS_FIFO_STATUS;					// 0x4b800090
    UINT32 ATA_FIFO_STATUS;					// 0x4b800094
} S3C2443_CFCARD_REG, *PS3C2443_CFCARD_REG;

#if __cplusplus
    }
#endif

#endif