initialize.c

This experiment uses the Blackfi n BF533/BF537 EZ-KIT to run a simple FIR fi lter on stereo channe

///////////////////////////////////////////////////////////////////////////////
//
// 	
//  Experiment 6.11_BF533 Implement FIR filter using BF533 EZ-KIT
//  FILE name: Initialize.c
//
//  Description: Perform real-time FIR filtering on stereo signals.
//		 Initialization of the BF533 EZ-KIT's peripherals,
//		 interrupt, DMA, FIR routine
//  
//  For the book "Embedded Signal Processing with the Micro Signal Architecture"
//		  By Woon-Seng Gan and Sen M. Kuo
//		  Publisher: John Wiley and Sons, Inc.
//
//  Tools used: VisualDSP++ v4.0 (running on BF533 EZ-KIT)
//
///////////////////////////////////////////////////////////////////////////////


#include "fir.h"

//--------------------------------------------------------------------------//
// Function:	Init_EBIU													//
//																			//
// Description:	This function initializes and enables asynchronous memory 	//
//				banks in External Bus Interface Unit so that Flash A can be //
//				accessed.													//
//--------------------------------------------------------------------------//
void Init_EBIU(void)
{
	*pEBIU_AMBCTL0	= 0x7bb07bb0;
	*pEBIU_AMBCTL1	= 0x7bb07bb0;
	*pEBIU_AMGCTL	= 0x000f;
}


//--------------------------------------------------------------------------//
// Function:	Init_Flash													//
//																			//
// Description:	This function initializes pin direction of Port A in Flash A//
//				to output.  The AD1836_RESET on the ADSP-BF533 EZ-KIT board //
//				is connected to Port A.										//
//--------------------------------------------------------------------------//
void Init_Flash(void)
{
	*pFlashA_PortA_Dir = 0x1;
}

//--------------------------------------------------------------------------//
// Function:	Init_LED													//
//																			//
// Description:	This function initializes pin direction of Port B in Flash A//
//				to output. This port controls the LEDs.						// 
//--------------------------------------------------------------------------//
void Init_LED(void)
{
	*pFlashA_PortB_Dir = 0xFF;
	*pFlashA_PortB_Data = 0x00;
}

//--------------------------------------------------------------------------//
// Function:	Init_GPIO													//
//																			//
// Description:	This function initializes the pushbuttons on PF10 and PF11.	//
//--------------------------------------------------------------------------//
void Init_GPIO(void)
{
	// Enable PF10 and PF11 as input, interrupt source,
	// edge sensitive
	*pFIO_DIR = *pFIO_DIR & 0xF0FF;
	*pFIO_INEN = *pFIO_INEN | 0x0F00;
	*pFIO_EDGE = *pFIO_EDGE | 0x0F00;
	*pFIO_MASKA_D = *pFIO_MASKA_D | 0x0F00;
	pushbt_flag = 0;
}

//--------------------------------------------------------------------------//
// Function:	Init1836()													//
//																			//
// Description:	This function sets up the SPI port to configure the AD1836. //
//				The content of the array sCodec1836TxRegs is sent to the 	//
//				codec.														//
//--------------------------------------------------------------------------//
void Init1836(void)
{
	int i;
	int j;
	static unsigned char ucActive_LED = 0x01;
	
	// write to Port A to reset AD1836
	*pFlashA_PortA_Data = 0x00;
	
	// write to Port A to enable AD1836
	*pFlashA_PortA_Data = ucActive_LED;
	
	// wait to recover from reset
	for (i=0; i<0xf000; i++);

	// Enable PF4
	*pSPI_FLG = FLS4;
	// Set baud rate SCK = HCLK/(2*SPIBAUD) SCK = 2MHz	
	*pSPI_BAUD = 16;
	// configure spi port
	// SPI DMA write, 16-bit data, MSB first, SPI Master
	*pSPI_CTL = TIMOD_DMA_TX | SIZE | MSTR;
	
	// Set up DMA5 to transmit
	// Map DMA5 to SPI
	*pDMA5_PERIPHERAL_MAP	= 0x5000;
	
	// Configure DMA5
	// 16-bit transfers
	*pDMA5_CONFIG = WDSIZE_16;
	// Start address of data buffer
	*pDMA5_START_ADDR = sCodec1836TxRegs;
	// DMA inner loop count
	*pDMA5_X_COUNT = CODEC_1836_REGS_LENGTH;
	// Inner loop address increment
	*pDMA5_X_MODIFY = 2;
	
	// enable DMAs
	*pDMA5_CONFIG = (*pDMA5_CONFIG | DMAEN);
	// enable spi
	*pSPI_CTL = (*pSPI_CTL | SPE);
	
	// wait until dma transfers for spi are finished 
	for (j=0; j<0xaff; j++);
			
	// disable spi
	*pSPI_CTL = 0x0000;
}


//--------------------------------------------------------------------------//
// Function:	Init_Sport0													//
//																			//
// Description:	Configure Sport0 for I2S mode, to transmit/receive data 	//
//				to/from the AD1836. Configure Sport for external clocks and //
//				frame syncs.												//
//--------------------------------------------------------------------------//
void Init_Sport0(void)
{
	// Sport0 receive configuration
	// External CLK, External Frame sync, MSB first, Active Low
	// 16-bit data, Stereo frame sync enable
	*pSPORT0_RCR1 = RFSR | LRFS | RCKFE;
	*pSPORT0_RCR2 = SLEN_16 | RXSE | RSFSE;
	
	// Sport0 transmit configuration
	// External CLK, External Frame sync, MSB first, Active Low
	// 16-bit data, Secondary side enable, Stereo frame sync enable
	*pSPORT0_TCR1 = TFSR | LTFS | TCKFE;
	*pSPORT0_TCR2 = SLEN_16 | TXSE | TSFSE;
}

//--------------------------------------------------------------------------//
// Function:	Init_DMA													//
//																			//
// Description:	Initialize DMA1 in autobuffer mode to receive and DMA2 in	//
//				autobuffer mode to transmit									//
//--------------------------------------------------------------------------//
void Init_DMA(void)
{
	// Set up DMA1 to receive
	// Map DMA1 to Sport0 RX
	*pDMA1_PERIPHERAL_MAP = 0x1000;
	
	// Configure DMA1
	// 16-bit transfers, Interrupt on completion, Autobuffer mode
	*pDMA1_CONFIG = WNR | WDSIZE_16 | DMA2D | DI_SEL | DI_EN | FLOW_1;
	// Start address of data buffer
	*pDMA1_START_ADDR = iRxBuffer1;
	// DMA inner loop count
	*pDMA1_X_COUNT = IP_SIZE*4;
	// Inner loop address increment
	*pDMA1_X_MODIFY = 2;
	// DMA outer loop count (2 sub buffers)
	*pDMA1_Y_COUNT = 2;
	// Outer loop address increment
	*pDMA1_Y_MODIFY = 2;
	
	
	// Set up DMA2 to transmit
	// Map DMA2 to Sport0 TX
	*pDMA2_PERIPHERAL_MAP = 0x2000;
	
	// Configure DMA2
	// 16-bit transfers, Autobuffer mode
	*pDMA2_CONFIG = WDSIZE_16 | DMA2D | FLOW_1;
	// Start address of data buffer
	*pDMA2_START_ADDR = iTxBuffer1;
	// DMA inner loop count
	*pDMA2_X_COUNT = IP_SIZE*4;
	// Inner loop address increment
	*pDMA2_X_MODIFY = 2;
	// DMA outer loop count (2 sub buffers)
	*pDMA2_Y_COUNT = 2;
	// Outer loop address increment
	*pDMA2_Y_MODIFY = 2;
	
}

//--------------------------------------------------------------------------//
// Function:	Enable_DMA_Sport											//
//																			//
// Description:	Enable DMA1, DMA2, Sport0 TX and Sport0 RX					//
//--------------------------------------------------------------------------//
void Enable_DMA_Sport(void)
{
	// enable DMA1
	*pDMA1_CONFIG	= (*pDMA1_CONFIG | DMAEN);
	
	// enable Sport0 RX
	*pSPORT0_RCR1 	= (*pSPORT0_RCR1 | RSPEN);
	
	*pDMA2_CONFIG	= (*pDMA2_CONFIG | DMAEN);
	*pSPORT0_TCR1 	= (*pSPORT0_TCR1 | TSPEN);
}

//--------------------------------------------------------------------------//
// Function:	Init_Interrupts												//
//																			//
// Description:	Initialize Interrupt for Sport0 RX							//
//--------------------------------------------------------------------------//
void Init_Interrupts(void)
{
	// Set Sport0 RX (DMA1) interrupt priority to 2 = IVG9
	*pSIC_IAR0 = 0xffffffff;
	*pSIC_IAR1 = 0xffffff2f;
	*pSIC_IAR2 = 0xffff5fff;

	// assign ISRs to interrupt vectors
	// Sport0 RX ISR -> IVG 9
	register_handler(ik_ivg9, Sport0_RX_ISR);
	register_handler(ik_ivg12, Switch_ISR);

	// enable Sport0 RX interrupt
	*pSIC_IMASK = 0x00090200;
	ssync();
}

void Init_Filter(void)
{
	fir_init(state1, lpf, ldelay, TAPS, 1);
	fir_init(state2, lpf, rdelay, TAPS, 1);
}