process_data.c

This experiment uses the Blackfi n BF533/BF537 EZ-KIT to run a simple FIR fi lter on stereo channe

///////////////////////////////////////////////////////////////////////////////
//
// 	
//  Experiment 6.11_BF537 Implement FIR filter using BF537 EZ-KIT
//  FILE name: Process_data.c
//
//  Description: Perform real-time FIR filtering on stereo signals.
//		 
//  
//  For the book "Embedded Signal Processing with the Micro Signal Architecture"
//		  By Woon-Seng Gan and Sen M. Kuo
//		  Publisher: John Wiley and Sons, Inc.
//
//  Tools used: VisualDSP++ v4.0 (running on BF537 EZ-KIT)
//
///////////////////////////////////////////////////////////////////////////////

#include "fir.h"

int cycleBegin, cycleEnd;

void Process_Data(void)
{
	int i, cycleBegin, cycleEnd;
	
	if (pushbt_flag == 1)
	{	
		//=====Reading Cycle before the Task============
		cycleBegin = sysreg_read(reg_CYCLES);
		//==============================================
		
		firc(sCh0LeftIn, sCh0LeftOut,state1);
		
		
				
		firc(sCh0RightIn, sCh0RightOut,state2);
		//=====Reading Cycle after the Task=============
		cycleEnd = sysreg_read(reg_CYCLES);
		cycleCount = cycleEnd - cycleBegin;
		//==============================================
	}
	
	else
	{
		/*	Perform a loopback	*/	
		for (i=0; i<IP_SIZE; i++)
		{
			sCh0LeftOut[i] = sCh0LeftIn[i];
			sCh0RightOut[i] = sCh0RightIn[i];
		}
	}
}
	
void firc(const fract16 in[], fract16 out[], fir_state_fr16 state)
{
	int i, j, k, nc;
	fract16 *coef;
	fract16 *rdelaybuf, *wdelaybuf, temp;
	fract32	acc = 0;
	
	coef=state.h;
	rdelaybuf=state.d;			// For reading delay buffer
	wdelaybuf=state.p;			// For updating delay buffer
	nc=state.k;
	
	for (i=0; i<IP_SIZE; i++)
	{
		wdelaybuf[0]=in[i];
		for (j=0; j<nc; j++)
			acc+=coef[j]*wdelaybuf[j];

		out[i] = (fract16) (acc >> 15);
		
		for (k=(nc-1); k>=1; k--)
		{
			wdelaybuf[k]=wdelaybuf[k-1];
								// Point to the next location 
								// to be shifted
		}
		acc = 0;
	}
}