lcd.vhd

应用actel公司的a3p030进行调试通过的LCD1602显示程序 可以应用此程序进行网站显示 等

-- lcd.vhd
-- LCD.vhd

--利用FPGA驱动LCD显示中文字符"年"的VHDL程序。
--文件名     ：lcd1602.vhd。
--功能       ： FGAD驱动LCD显示中文字符"年"。
--最后修改日期 ：2006.08.28。


library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity LCD1602 is
Port (   Clk : in std_logic; --状态机时钟信号，同时也是液晶时钟信号，其周期应该满足液晶数据的建立时间
       Reset : in std_logic;
      LCD_RS : out std_logic; --寄存器选择信号
      LCD_RW : out std_logic; --液晶读写信号
      LCD_EN : out std_logic; --液晶时钟信号
         LED : out std_logic;
    LCD_Data : out std_logic_vector(7 downto 0)); --液晶数据信号
end LCD1602;



architecture Behavioral of LCD1602 is
       type state is (set_dlnf,set_cursor,set_dcb,set_cgram,write_cgram,set_ddram,write_LCD_Data);
       
       signal Current_State:state;
       
      signal q:std_logic_vector(24 downto 0); 
      signal rst:std_logic;

       type ram2 is array(0 to 7) of std_logic_vector(7 downto 0);

       constant cgram:ram2:=(
  ("00001000"),
  ("00001111"),
  ("00010010"),
  ("00001111"),
  ("00001010"),
  ("00011111"),
  ("00000010"),
  ("00000010"));--年字符数据存储器   
               
signal Clkk    : std_logic;
signal Count   : std_logic_vector(20 downto 0);
signal Clk_Out : std_logic;
signal LCD_Clk : std_logic;
begin
     LCD_EN <= Clk_Out ; --液晶时钟信号
     LED <= Clk_Out;
     LCD_RW <= '0' ;   --写数据
clock :
  process(Clk,Reset)
  begin 
      if (Reset='0') then
        q<="1111111111111111111111111";
      elsif(clk='0'and clk'event) then
           q<=q+1;
       end if;

  LCD_Clk <= Clk_Out;
  led<=q(23);
end process;


control:
process(LCD_Clk,Reset,Current_State)           --液晶驱动控制器
variable cnt1: std_logic_vector(2 downto 0);
begin
  if Reset='0'then
    Current_State<=set_dlnf;
    cnt1:=(others => '1');
    LCD_RS<='0';
  elsif rising_edge(LCD_Clk)then
    Current_State <= Current_State ;
    LCD_RS <= '0';
  case Current_State is
    when set_dlnf=>        
  LCD_Data<="00111100";--3cH
  Current_State<=set_cursor;
    when set_cursor=>
  LCD_Data<="00000110";--06H
  Current_State<=set_dcb;
    when set_dcb=>
  LCD_Data<="00001111";--0fH
  Current_State<=set_cgram;
    when set_cgram=>
  LCD_Data<="01000000";--40H
  Current_State<=write_cgram;
    when write_cgram=>     --向CGRAM中写入"年"
  LCD_RS<='1';
  cnt1:=cnt1+1;
  LCD_Data<=cgram(conv_integer(cnt1));    
  if cnt1 = "111" then
  Current_State<=set_ddram;    
  end if;
    when set_ddram=>       --从第一行的起始地址开始显示
  LCD_Data<="10000000";--80H
  Current_State<=write_LCD_Data;
    when write_LCD_Data=>
  LCD_RS<='1';
  LCD_Data<="00000000"; --写入字符"年"
    when others => null;
  end case;
end if;
end process;

  

end Behavioral;